Trench Gate High-Withstand Voltage MOSFET Size Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional methods for reducing the size of high-withstand voltage MOSFETs are limited, as they require large drift regions and trench structures, making it difficult to miniaturize both high-withstand and low-withstand voltage transistors simultaneously while maintaining adequate punch-through withstand voltage and electric field alleviation.
Innovation Solution
The semiconductor device incorporates a trench portion with polysilicon layers and impurity diffusion drift layers on a semiconductor substrate, allowing for self-aligned formation of the channel and drift regions, which reduces the channel length and drift length, enabling size reduction and adjustable withstand voltage through photolithography.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a long gate length is used to ensure punch-through withstand voltage, then the withstand voltage is improved, but the device size increases
Solution Approach 1:
The patent transitions from a planar gate structure to a three-dimensional trench gate structure. The gate electrode is formed within a trench that extends vertically into the drift region, utilizing the vertical dimension to achieve longer effective gate length and better electric field control without increasing the lateral footprint of the device. This dimensional change allows the device to maintain high withstand voltage while reducing overall device area.
Solution Approach 2:
The gate electrode is nested within the trench structure, which itself is embedded in the drift region. This nested configuration allows the gate to extend deeper into the drift region vertically while maintaining a compact lateral layout, effectively increasing the gate's influence on the channel without proportionally increasing the device's planar dimensions.
2Reliability
If a low-concentration diffusion region is used as drift region, then the punch-through withstand voltage is improved, but the device size increases
Solution Approach 1:
The drift region is configured to extend vertically into the substrate rather than only laterally. By utilizing the vertical dimension, the drift region can achieve the necessary low-concentration doping profile for high withstand voltage while occupying less lateral space, thus reducing overall device size.
3Area of moving object
If trenches are formed to reduce drift region size, then the device size is reduced, but manufacturing complexity increases
Solution Approach 1:
The manufacturing process is segmented into distinct sequential steps: forming the trench structure, depositing the gate electrode material, patterning the gate electrode, and forming source and drain regions. Each step is independently optimized and can be performed using standard semiconductor fabrication techniques, making the overall complex structure manufacturable through systematic process breakdown.
Solution Approach 2:
The trench structure is formed preliminarily before gate electrode deposition. This preliminary trench formation creates a pre-defined three-dimensional template that guides subsequent processing steps, allowing the gate electrode to be precisely positioned and shaped without requiring complex real-time adjustments during manufacturing.
4Area of moving object
If high stepped trench structure is formed, then the drift region size is reduced, but further miniaturization becomes difficult
Solution Approach 1:
The invention utilizes the vertical dimension within the trench to further reduce the effective drift region length without increasing lateral dimensions. By controlling the trench depth and the vertical extent of the drift region, additional miniaturization is achieved in the depth direction, allowing continued scaling despite the presence of the trench structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for significant reduction in the size of high-withstand voltage MOSFETs, enables easy adjustment of withstand voltage, and reduces parasitic capacitance, enabling higher operating speeds and shared manufacturing processes for both high- and low-withstand voltage MOSFETs.
Implementation Method 1
a gate electrode formed through a gate oxide film on the bottom and side surfaces of the trench portion
Implementation Method 2
two impurity diffusion drift layers positioned in the both sides of the trench portion and formed by implanting an impurity of the second conductivity in the surface of the high-withstand voltage active region under the polysilicon layers
Data Source
AI summary
The high-withstand voltage MOSFET comprises a trench portion formed at the high-withstand voltage active region on a semiconductor substrate, two polysilicon layers formed on the high-withstand voltage active region on both sides of the trench portion by implanting an impurity of the conductivity type opposite to the high-withstand voltage active region, two impurity diffusion drift layers formed on both sides of the trench portion by implanting an impurity of the conductivity type opposite to the high-withstand voltage active region in the surface of the high-withstand voltage active region under the polysilicon layers, and a gate electrode formed through a gate oxide film on bottom and side surfaces of the trench portion and end surfaces and upper surfaces of adjacent regions of the polysilicon layers close to the trench portion, and source and drain regions are formed in the two polysilicon layers excluding the adjacent regions covered with the gate electrode.