Trench-Gate Oxide Semiconductor Transistor for Short-Channel Control
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Solution Overview
Problem
Oxide semiconductor transistors face challenges with reduced charge mobility and short channel effects due to decreased channel length, leading to threshold voltage shifts and reduced bit storage capacity in ferroelectric field-effect transistors.
Innovation Solution
The design includes an oxide semiconductor transistor with a ferroelectric layer between the gate electrode and the oxide semiconductor layer, extending along both lateral and bottom surfaces of the gate electrode, and a dielectric layer with negative capacitance characteristics, along with diffusion barriers to prevent hydrogen permeation, enhancing channel length and electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the channel length is decreased to reduce device size, then device integration density is improved, but charge mobility decreases and short channel effects cause threshold voltage shift
Solution Approach 1:
The gate electrode is extended in the vertical dimension by forming it within a trench structure that penetrates through the substrate. This three-dimensional gate configuration increases the effective gate-channel interaction area without increasing the planar device footprint, thereby maintaining high integration density while improving charge mobility and reducing short channel effects through enhanced electric field control.
Solution Approach 2:
The gate electrode is nested within the trench structure, with the gate insulating layer surrounding the gate electrode. This nested configuration allows the gate to be positioned closer to the channel region, increasing the effective gate control without increasing the overall device area, thus resolving the contradiction between device size and electrical characteristics.
2Area of moving object
If the gate size is decreased in ferroelectric field-effect transistors, then device size is reduced, but the number of domains in the ferroelectric layer decreases, reducing bit storage capacity
Solution Approach 1:
The trench structure enables the gate electrode to extend vertically through the substrate, creating additional surface area for ferroelectric domain formation in the vertical dimension. This allows the device to maintain a small planar footprint while providing sufficient gate surface area to support the required number of ferroelectric domains for adequate bit storage capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the electrical characteristics of oxide semiconductor transistors by increasing channel length and maintaining high integration density, thereby addressing the limitations of reduced bit storage and mobility.
Implementation Method 1
The ferroelectric layer and the dielectric layer may have negative capacitance characteristics
Implementation Method 2
a first diffusion barrier between the oxide semiconductor layer and the insulating substrate, wherein the first diffusion barrier may prevent, for example, reduce or prevent hydrogen from permeating into the oxide semiconductor layer
Data Source
AI summary
An oxide semiconductor transistor includes: an insulating substrate including a trench; a gate electrode in the trench; an oxide semiconductor layer on a surface of the insulating substrate, the surface exposed through the trench; and a ferroelectric layer between the gate electrode and the oxide semiconductor layer, wherein the oxide semiconductor layer may include a source region and a drain region which are on the insulating substrate outside the trench and are apart from each other with the gate electrode therebetween.