Trench Gate Semiconductor Device with Localized Doping for Breakdown Voltage
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Solution Overview
Problem
Conventional semiconductor devices with trench gate structures face limitations in achieving both high breakdown voltage and large on-current due to increased electric field intensity within the gate oxide film, particularly at the bottom end of the trench, which restricts the flow of current and degrades the device's performance.
Innovation Solution
Incorporating a low resistance n-layer formed deeper than the trench, with a higher donor concentration than the n− layer, and an electric field relaxation p-layer formed deeper than the trench, to reduce the electric field intensity at the gate oxide film and enhance breakdown voltage while lowering resistance in the on-state by providing a path for current flow.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate oxide film is made thinner to reduce on-resistance, then the on-current increases, but the breakdown voltage decreases due to increased electric field intensity
Solution Approach 1:
The patent applies local quality by creating a non-uniform doping concentration profile in the drift region. Specifically, a first doping concentration is applied to a first region and a second doping concentration (different from the first) is applied to a second region. This spatial variation in doping concentration allows different portions of the drift region to have optimized electrical characteristics, enabling the device to achieve both high breakdown voltage and low on-resistance simultaneously.
2Reliability
If the donor concentration in the n- layer is reduced to increase breakdown voltage, then the breakdown voltage improves, but the on-resistance increases
Solution Approach 1:
The patent implements local quality through spatially varying doping concentrations in the drift region. By applying a first doping concentration to a first region and a second doping concentration to a second region, the structure enables different areas to serve different functions: one region optimized for breakdown voltage while another region optimized for current conduction, thereby resolving the contradiction between high breakdown voltage and low on-resistance.
3Speed
If the trench depth is increased to improve switching performance, then the switching speed improves, but the electric field intensity at the gate oxide film increases causing breakdown
Solution Approach 1:
The patent applies local quality by implementing non-uniform doping concentrations at different depths and lateral positions in the drift region. This spatially differentiated doping profile allows the device to achieve deep trench structures for fast switching while maintaining gate oxide integrity through localized electric field management in different regions of the semiconductor structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces the resistance in the on-state by up to one-fourth while maintaining a low increase in electric field intensity, allowing for both high breakdown voltage and large on-current capabilities.
Implementation Method 1
the intensity of the electric field is reduced, whereby the breakdown voltage can be enhanced
Implementation Method 2
a depletion region spreads from the circumference of the trench T and the interface (the pn junction) between the p layer 13 and the n− layer 12 towards the n− layer 12
Implementation Method 3
a current flows along a side wall of the trench T within the p layer 13, and in a vertical direction within the n− layer 12
Implementation Method 4
being provided with a carrier concentration higher than that of the first semiconductor region
Data Source
AI summary
A semiconductor device of trench gate type is provided that has achieved both large on-current and high off-state breakdown voltage. Around trench T and between it and electric field relaxation p-layer 16, low resistance n-layer 17 is provided. Low resistance n-layer 17 is formed deeper than trench T, and shallower than electric field relaxation p-layer 16, being connected to n−-layer (drift layer) 12 just thereunder, and thus low resistance n-layer 17 and n−-layer 12 are integrated to form a drift layer. Although low resistance n-layer 17 is n-type as is n−-layer 12, donor concentration thereof is set higher than that of n−-layer 12, thereby low resistance n-layer 17 having a resistivity lower than that of n−-layer 12. This low resistance n-layer 17 is provided in on-current path (between electric field relaxation p-layer 16 and trench T), whereby low resistance n-layer 17 can lower the resistance to on-current.