Trench-Gate Semiconductor Device with Segmented Doping
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Solution Overview
Problem
Trench-gate semiconductor devices face a conflict between minimizing forward bias drain-source resistance (Rdson) for reduced power dissipation and maximizing reverse bias breakdown voltage (BVdss), with existing RESURF structures being complex to design and implement.
Innovation Solution
A trench-gate semiconductor device design featuring a conductive gate and field plate with a stepped oxide structure, including a low-doped channel-accommodating region adjacent a deep trench, allowing a significant proportion of reverse bias to be dropped across this region without increasing Rdson, thereby achieving high BVdss without the need for RESURF structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a thicker and lower doped epi layer is used to increase reverse bias breakdown voltage, then BVdss is improved, but forward bias drain-source resistance increases
Solution Approach 1:
The device is segmented into distinct functional regions: a first region adjacent to the trench for supporting reverse bias, and a second region spaced apart from the first region for accommodating forward bias current flow. This spatial segmentation allows each region to be optimized for its specific function without compromise.
Solution Approach 2:
Different regions of the semiconductor device are given different doping characteristics tailored to their specific functions. The first region has doping optimized for high breakdown voltage, while the second region has doping optimized for low on-resistance. This local differentiation resolves the contradiction by allowing each area to have the properties it needs.
2Reliability
If a RESURF structure is used to breach the 1D breakdown limit, then reverse bias breakdown voltage is improved, but device complexity increases
Solution Approach 1:
The device structure is divided into separate functional regions with distinct doping profiles. The first region handles reverse bias support while the second region handles forward bias current, eliminating the need for complex RESURF structures and their associated tight process controls.
Solution Approach 2:
The invention extracts and eliminates the need for RESURF structures by implementing a simpler alternative architecture. The dual-region structure achieves the same performance benefits without requiring the complex oxide thickness and doping tolerances that RESURF structures demand.
Data Source
AI summary
A trench-gate semiconductor device is disclosed, in which the player (10,6) which forms the body region (in a n-channel device) extends adjacent the trench (4) deeper into the device, to lie adjacent a lower trench electrode (3b, 3c). Since the p-layer extension (6) forms part of the channel, it must be very low doped, in order not to increase unduly the channel resistance in the on-state. The replacement of some of the out-diffusion resistance in the drift region by the (smaller) channel resistance results in a lower over-all Rdson. In the off-state, the p-layer forms, together with the underlying n-drift layer, a non-abrupt function, so that the depletion region in the off-state extends closer to the top surface (2) than for a conventional RSO trench-MOS, being split between the p- and n-layers, rather than all being in the n-drift region. The invention does not require a RESURF device structure, so has wide process windows, since the dopant levels and layer thicknesses do not have to be controlled to provide charge balancing.