Trench-Mesa Transistor Layout for Lower On-State Voltage
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Solution Overview
Problem
Existing semiconductor devices, such as IGBTs, face challenges in improving operating parameters like on-state voltage and switching speed, which affect their efficiency and performance in applications like motor drive inverters and DC to DC power converters.
Innovation Solution
The semiconductor device comprises a transistor with a drift region, a body region, and a plurality of trenches that pattern the substrate into mesas, including an active mesa and a dummy mesa. A gate electrode is placed in the active trench, and a source region is located in the active mesa, with a one-sided channel configured to form in the active mesa. The device also includes a barrier region with a higher doping concentration than the drift region, arranged between the body and drift regions, and can be present in either the active or dummy mesas.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the semiconductor device uses conventional structures without trenches and mesas, then the device complexity is lower, but the on-state voltage is higher and switching speed is slower
Solution Approach 1:
The semiconductor substrate is divided into multiple mesas separated by trenches. The active mesa contains the channel formation region while dummy mesas are positioned adjacent to it. This segmentation creates confined carrier paths that improve switching speed while maintaining manageable device complexity through systematic arrangement.
Solution Approach 2:
Different regions of the semiconductor device are given different properties: the active mesa contains the channel formation region with specific doping concentrations for optimal switching, while dummy mesas are structured to confine carriers without forming active channels. This local differentiation improves switching speed in the active region while the dummy regions contribute to overall performance enhancement.
2Reliability
If the semiconductor device uses conventional structures without trenches and mesas, then the manufacturing process is simpler, but the on-state voltage is higher
Solution Approach 1:
The device is segmented into mesas and trenches, allowing precise control of carrier confinement and electric field distribution. This segmentation enables lower on-state voltage by optimizing the channel structure, while the systematic fabrication process for creating trenches and mesas maintains reasonable manufacturing complexity.
Solution Approach 2:
The doping concentrations in the channel formation region and barrier regions are precisely controlled to achieve optimal on-state voltage. By adjusting these parameters in the mesa structures, the device achieves improved electrical characteristics while the fabrication processes for implementing these parameter changes are well-established in semiconductor manufacturing.
3Speed
If the semiconductor device uses conventional structures without trenches and mesas, then the device structure is simpler, but the switching speed is slower
Solution Approach 1:
The semiconductor substrate is divided into multiple mesas separated by trenches. The active mesa contains the channel formation region while dummy mesas are positioned adjacent to it. This segmentation creates confined carrier paths that improve switching speed while maintaining manageable device complexity through systematic arrangement.
Solution Approach 2:
The device structure transitions from a planar configuration to a three-dimensional mesa structure with trenches. This dimensional change creates vertical confinement of carriers and enables better control of electric fields, improving switching speed while the overall device structure remains organized and manufacturable.
4Reliability
If the semiconductor device uses conventional structures without trenches and mesas, then the manufacturing precision requirements are lower, but the on-state voltage is higher
Solution Approach 1:
The doping concentrations in the channel formation region and barrier regions are precisely controlled to achieve optimal on-state voltage. By adjusting these parameters in the mesa structures, the device achieves improved electrical characteristics while the fabrication processes for implementing these parameter changes are well-established in semiconductor manufacturing.
Solution Approach 2:
Different regions of the semiconductor device are given different properties: the active mesa contains the channel formation region with specific doping concentrations for optimal switching, while dummy mesas are structured to confine carriers without forming active channels. This local differentiation improves switching speed in the active region while the dummy regions contribute to overall performance enhancement.
Data Source
AI summary
A semiconductor device includes a transistor that has: a drift region of a first conductivity type in a semiconductor substrate having a first main surface; a body region of a second conductivity type between the drift region and the first main surface; a plurality of trenches in the first main surface and patterning the semiconductor substrate into a plurality of mesas including a first mesa and a plurality of dummy mesas, the plurality of trenches including an active trench and a plurality of dummy trenches arranged in a row; a gate electrode arranged in the active trench; and a source region of the first conductivity type in the first mesa. The first mesa is arranged adjacent to the active trench. A dummy mesa is arranged between each adjacent pair of the dummy trenches. The dummy mesas do not carry load current during an on-state of the transistor.