Trench MOSFET Doping Layout for Self-Aligned Anti-Breakdown Regions
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Solution Overview
Problem
The existing methods for manufacturing semiconductor devices face challenges in regulating dopant concentration in doping areas due to alignment deviations caused by photomask usage in trench gate metal-oxide-semiconductor field-effect transistors, where channels are buried, making it difficult to achieve precise doping concentrations.
Innovation Solution
A method involving a substrate with a base material and epitaxial layer, where a first conductive type lightly doped region and multiple heavily doped regions are formed, followed by the use of a mask and spacer to create an anti-breakdown region through self-alignment, allowing for precise doping without photomask-defined steps, thereby reducing alignment deviations and enabling different doping concentrations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If photomask is used to define doping areas, then doping areas can be defined, but alignment deviation occurs
Solution Approach 1:
The mask pattern automatically defines the doping area boundaries through self-alignment with previously formed structures (trenches and existing doped regions). The doping process uses the mask's physical presence as the reference, eliminating the need for separate photomask alignment steps and thereby preventing alignment deviation while maintaining precise doping concentration control.
2Volume of moving object
If channels are buried in trenches, then device volume is reduced, but dopant concentration regulation becomes difficult
Solution Approach 1:
The method performs preliminary doping of the semiconductor layer before forming the trench structure. By doping the semiconductor layer while it is still planar and accessible, precise dopant concentration can be controlled using standard doping techniques. After doping, the trench is formed to bury the channel, achieving both precise dopant concentration regulation and compact device volume.
Data Source
AI summary
A method of manufacturing a semiconductor device is provided, including: forming a first conductive type lightly doped region in the epitaxial layer; forming a first conductive type heavily doped region and a second conductive type heavily doped region in the epitaxial layer on the first conductive type lightly doped region, in which the neighboring first conductive type heavily doped regions are spaced apart by the second conductive type heavily doped region; disposing the mask on the second conductive type heavily doped region; disposing a spacer on a sidewall of the mask; doping a first conductive type dopant in the first conductive type lightly doped region to form an anti-breakdown region; removing the mask and forming a trench extending into the second conductive type heavily doped region, first conductive type lightly doped region and the epitaxial layer; and removing the spacer.