Trench MOSFET Termination Layout with Deep Floating Gates
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Solution Overview
Problem
Trench MOSFETs with trenched floating gates in the termination area face issues of high leakage current and low breakdown voltage due to poor isolation between the drain and source regions, caused by shallow trenched floating gates and floating deep P body regions not being adequately connected.
Innovation Solution
The design features trenched floating gates in the termination area with a depth equal to or deeper than the body junction of surrounding body regions, and the inclusion of trenched channel stop gates to prevent leakage, along with a specific layout and fabrication process that ensures high breakdown voltage by eliminating source regions between floating gates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If shallow trenched floating gates are used in the termination area, then the fabrication process is simpler, but leakage current increases and breakdown voltage decreases
Solution Approach 1:
The patent changes the depth parameter of the trenched floating gates in the termination area, making them equal to or deeper than the body junction depth, which is different from the shallow gates used in prior art. This parameter change effectively blocks the leakage path while maintaining fabrication feasibility through a single etch process.
Solution Approach 2:
The patent segments the device into active area and termination area with different gate depth configurations. The termination area uses deep trenched floating gates while the active area uses conventional gates, allowing optimized performance in each region without compromising the other.
2Reliability
If source regions are disposed between adjacent trenched floating gates in the termination area, then the structure provides better isolation, but heavy leakage current occurs due to channel region turning on
Solution Approach 1:
The patent extracts the source regions from the termination area, eliminating the harmful configuration where source regions were disposed between adjacent trenched floating gates. This removal prevents the leakage path formation while the deep trenched floating gates provide sufficient isolation on their own.
Solution Approach 2:
The patent converts the potentially harmful floating deep P body regions into beneficial isolation structures by making the trenched floating gates deep enough to extend below them, utilizing the floating bodies to enhance the blocking effect rather than allowing them to create leakage paths.
3Reliability
If trenched floating gates are made deeper to block leakage, then breakdown voltage is maintained, but fabrication complexity increases
Solution Approach 1:
The patent makes the trenched floating gates in the termination area serve multiple functions: they provide electrical isolation between adjacent structures, block leakage current paths, and maintain breakdown voltage. This multi-functionality is achieved through a single etch process that creates uniformly deep trenches throughout the device.
Data Source
AI summary
A trench MOSFET layout with multiple trenched floating gates and at least one trenched channel stop gate in termination area shorted with drain region is disclosed to make it feasibly achieved after die sawing. The layout consisted of dual trench MOSFETs connected together with multiple sawing trenched gates across a space between the two trench MOSFETs having a width same as scribe line.