Shielded Gate Trench MOSFET Layout for Reliable Source Filling
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Solution Overview
Problem
The trench structure of shielded gate trench type metal-oxide-semiconductor field effect transistors (SGT-MOSFETs) poses challenges in electrode material filling, affecting device reliability and electrical characteristics, necessitating an improved semiconductor structure and manufacturing method.
Innovation Solution
A semiconductor structure featuring a first insulating layer, a floating portion, and two source regions disposed symmetrically within a trench, with gate regions aligned over the sources and separated by an insulating layer, along with a metal contact and additional insulating layers to enhance structural integrity and electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a trench structure is used in SGT-MOSFET, then on-resistance is reduced and power consumption is lowered, but electrode material filling becomes difficult and device reliability deteriorates
Solution Approach 1:
The gate structure is segmented into a first gate region and a second gate region separated by a gap, with the source region positioned in the gap. This segmentation allows the source region to be filled independently of the trench structure, resolving the electrode material filling difficulty while maintaining the low on-resistance benefit of the trench configuration.
Solution Approach 2:
A gate dielectric layer is introduced as an intermediary between the gate electrode and the semiconductor substrate, filling the trench structure. This intermediary layer enables reliable electrode formation and improves device reliability while preserving the electrical characteristics benefits of the trench structure.
2Manufacturing precision
If a trench structure is used in SGT-MOSFET, then on-resistance is reduced, but electrode material filling is susceptible to trench shape and material type
Solution Approach 1:
By dividing the gate into two separate gate regions with the source region in between, the manufacturing process can fill the source region material independently without being constrained by the trench shape or material type, significantly improving ease of manufacture while maintaining precise electrical characteristics.
Solution Approach 2:
The source region is positioned in the lateral dimension (gap between gates) rather than being constrained within the vertical trench structure. This dimensional change allows flexible material filling and processing while maintaining the electrical performance benefits of the trench configuration.
3Productivity
If source regions are disposed close to each other in the trench, then device density is increased, but structural defects occur during gate formation
Solution Approach 1:
The gate is segmented into two regions with the source region positioned in the gap, which prevents structural defects during gate formation while maintaining high device density through symmetric arrangement along the longitudinal direction of the trench.
Solution Approach 2:
The gate structure uses asymmetric positioning of the source region in the gap between two gate regions, which resolves the structural defect issue during formation while achieving high device density through optimized spatial arrangement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces structural defects and capacitance, improving the reliability and performance of SGT-MOSFETs by avoiding defects during gate formation and enhancing electrical characteristics.
Implementation Method 1
forming a second insulating layer on the first insulating layer by wet oxidation. A part of the second portion of the floating portion is converted to the second insulating layer
Data Source
AI summary
A semiconductor structure includes a first insulating layer, a floating portion, a second insulating layer, two source regions, and a first gate region. The first insulating layer is disposed in a trench of a semiconductor substrate. The floating portion is disposed in the first insulating layer. The floating portion has a first portion and a second portion extending from the first portion. The first insulating layer surrounds the first portion. The second insulating layer is disposed on the first insulating layer and extends to a top surface of the semiconductor substrate. The second insulating layer covers the second portion. The two source regions are disposed in the second insulating layer. The two source regions are separated by the second insulating layer and are disposed symmetrically along a longitudinal direction of the trench. The first gate region is disposed over the two source regions.