Trench Gate MOSFET Layout for Lower On-Resistance Switching
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Solution Overview
Problem
Existing semiconductor devices, particularly trench gate MOSFETs, face limitations in achieving optimal electrical characteristics such as low on-resistance and fast switching times due to inadequate design and manufacturing processes, which affect their performance in both low-frequency and high-frequency applications.
Innovation Solution
The semiconductor device incorporates a substrate with an epitaxial layer, trench structures with insulating and conductive portions, well regions, and gate structures, where the trench structures are electrically connected to either the source or gate electrodes, enhancing the surface electric field reduction and on-resistance, and allowing for flexible configuration for different operational frequencies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If trench gate MOSFETs use conventional design and manufacturing processes, then device structure is simpler and manufacturing is easier, but on-resistance is higher and switching times are slower
Solution Approach 1:
The device is segmented into distinct functional regions: a first trench gate structure for primary switching control, a second trench gate structure for additional field control, a body region, and a drift region. This segmentation allows each region to be optimized independently for its specific function, achieving lower on-resistance and faster switching through coordinated regional optimization rather than uniform design.
Solution Approach 2:
The patent transitions from conventional planar gate structures to three-dimensional trench gate structures that extend vertically into the semiconductor substrate. This dimensional change enables better electric field control and reduced on-resistance by utilizing the vertical dimension for field plate effects and improved charge distribution, while maintaining compatibility with standard manufacturing processes.
2Loss of time
If trench gate MOSFETs use conventional design and manufacturing processes, then manufacturing process is simpler and cost is lower, but switching energy loss is higher and response time is slower
Solution Approach 1:
The patent incorporates preliminary field control structures (the dual trench gate configuration) that are pre-positioned to manage electric field distribution during switching transitions. This preliminary action reduces switching energy loss by preventing excessive field concentrations before they occur, enabling faster switching times without requiring complex post-processing or additional manufacturing steps.
Solution Approach 2:
Different regions of the device are assigned different structural qualities: the trench gate structures use specific doping concentrations and geometries optimized for field control, the body region has optimized thickness and doping for carrier injection, and the drift region is tailored for voltage blocking. This local quality optimization enables reduced switching losses and faster response times while maintaining manufacturing simplicity through region-specific design rather than uniform complexity.
3Reliability
If existing semiconductor devices include both planar gate structure and trench gate structure, then device functionality is enhanced, but manufacturing complexity increases and electrical characteristics are not optimized
Solution Approach 1:
The patent merges the functionality of multiple gate structures into a unified dual trench gate architecture where both trench gates work cooperatively within the same device structure. This merging achieves enhanced electrical characteristics (lower on-resistance, faster switching) while avoiding the manufacturing complexity of integrating separate planar and trench gate structures, as both gates use the same trench fabrication process.
Data Source
AI summary
A semiconductor device includes a substrate having a first conductivity type, an epitaxial layer on the substrate and having the first conductivity type, a trench structure extending from the top surface of the epitaxial layer into the epitaxial layer, and a well region extending into the epitaxial layer and has the second conductivity type. The first sidewall of the well region is in contact with the trench structure. The trench structure includes a conductive portion and an insulating layer that covers the sidewalls and the bottom portion of the conductive portion. A drift region that has the first conductivity type is adjacent to and under the well region. The drift region is in contact with the second sidewall and the bottom surface of the well region. The semiconductor device further includes a gate structure on the top surface of the epitaxial layer and over the well region.