Trench Poly ESD Formation in MOSFETs
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Solution Overview
Problem
Conventional power MOSFET devices with ESD protection circuits require seven masks in manufacturing, making the process complex, time-consuming, and costly, and adding extra layers and steps, which increases costs and complexity.
Innovation Solution
The integration of ESD protection circuits within the trench polysilicon of MOSFET devices using existing process flows, reducing the number of masks needed to four, allowing for self-aligned etching and formation of ESD structures without additional mask layers, applicable to both Shield Gate Trench (SGT) and normal trench MOSFETs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional ESD protection circuits are integrated into power MOSFET devices using seven masks, then ESD protection is achieved, but the manufacturing process becomes complex, time-consuming, and costly
Solution Approach 1:
The patent merges the ESD protection structure with the existing trench MOSFET trench structure. The ESD protection is formed within the same trench that contains the MOSFET gate, source, and drain structures. This integration eliminates the need for separate ESD masks and allows the ESD protection to be formed simultaneously with the MOSFET structures using the same seven masks, thereby reducing manufacturing complexity while maintaining ESD protection functionality
Solution Approach 2:
The trench structure serves multiple functions: it forms the MOSFET gate structure, source/drain regions, and simultaneously creates the ESD protection diode structure. The same trench that defines the MOSFET active area also defines the ESD protection cathode region, allowing a single structural element to provide both power switching and electrostatic discharge protection functions
2Reliability
If seven masks are used for manufacturing ESD protection circuits, then ESD protection is achieved, but processing time and cost increase
Solution Approach 1:
The patent combines the ESD protection formation steps with the standard trench MOSFET fabrication steps. The same photolithography masks and etching processes that define the MOSFET structures also define the ESD protection structures. This merging of processes eliminates duplicate processing steps and reduces overall manufacturing time while ensuring both functions are properly formed
3Reliability
If additional poly layer is formed above silicon surface for ESD structure, then P-N junctions are created, but additional masks and processing steps are required
Solution Approach 1:
The patent extracts the ESD protection diode formation from the conventional approach that requires additional poly layer deposition. Instead, the ESD protection is formed by creating doped regions within the existing trench structure using the same poly-silicon layer that forms the MOSFET gate. This extraction eliminates the need for additional poly deposition and associated masks while still achieving the required P-N junction functionality for ESD protection
Data Source
AI summary
A semiconductor device includes a semiconductor material disposed in a trench with polysilicon lining at least the bottom of the trench. The semiconductor material includes differently doped regions configured as a PNP or NPN structure formed in the trench with differently doped regions located side by side across a width of the trench. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.