Trench Power Device Schottky Barrier Interface Area
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Solution Overview
Problem
Conventional trench MOS barrier Schottky (TMBS) constructions have a larger size due to Schottky barrier interference limited to the top surface of the epitaxial layer, which increases the forward voltage and generates the body diode effect, necessitating a reduction in size while maintaining effective performance.
Innovation Solution
The design incorporates a semiconductor structure with a shielding gate area and a TMBS area featuring trenches etched from the top surface, filled with an insulating layer, and metallic layers connecting top and side contacting surfaces to increase the Schottky barrier interface area, thereby reducing the TMBS area size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the Schottky barrier interference is limited to the top surface of the epitaxial layer in conventional TMBS construction, then the device structure is simpler, but the TMBS area size becomes too large
Solution Approach 1:
The patent extends the Schottky barrier interface from the top surface (2D) into the trench depth (3D), creating side contacting surfaces that provide additional interface area. This dimensional transition allows the Schottky barrier to utilize both top and side surfaces of the trench structure, effectively increasing the total interface area without proportionally increasing the planar footprint of the TMBS region.
2Area of stationary object
If the TMBS area size is reduced, then the device integration density improves, but the Schottky barrier interface area may be insufficient
Solution Approach 1:
By utilizing the vertical dimension through trench structures, the patent creates side contacting surfaces that extend the Schottky barrier interface into the depth direction. This allows the interface area to be maintained or increased while the planar footprint is reduced, as the additional interface area comes from the lateral walls of the trench rather than from expanding the top surface area.
3Power
If the JBS construction is applied with large electric current, then the device can handle higher power, but the forward voltage increases and body diode effect is generated
Solution Approach 1:
The patent creates localized Schottky barrier interfaces at both the top contacting surfaces and side contacting surfaces within the trench structure. This distributed local interface quality provides multiple pathways for current flow with lower forward voltage, preventing the body diode effect while maintaining high current handling capability. The Schottky barriers are strategically positioned at specific locations (top and sides of trench) to optimize local electrical properties.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively decreases the size of the TMBS area while maintaining or enhancing the Schottky barrier interface area, potentially reducing forward voltage and mitigating the body diode effect, thus improving the performance of the trench power device.
Implementation Method 1
the metallic layer connects the top contacting surfaces and the side contacting surfaces for causing the top contacting surfaces and the side contacting surfaces to be a Schottky barrier interface
Data Source
AI summary
A semiconductor structure of a trench power device comprises a base, an insulating layer, and a source conductive layer. The base includes a first trench etched from the top surface thereof, and two portions of the top surface arranged at two opposite sides of the first trench are respectively defined as two top contacting surfaces. Part of the first trench is filled with the insulating layer, and two inner walls of a non-filled portion of the first trench are respectively defined as two side contacting surfaces without contacting the insulating layer. The source conductive layer is embedded in the insulating layer. Thus, when a metallic layer is integrally formed on the semiconductor structure and connects the top contacting surfaces and the side contacting surfaces, the top contacting surfaces and the side contacting surfaces are configured to be a Schottky barrier interface.