Trench Power Semiconductor Isolation Structure for Single-Chip Integration
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Solution Overview
Problem
Conventional power semiconductor components require separate processing on different chips, leading to increased manufacturing costs and time due to the need for additional steps like thick oxide layer formation for electrical isolation.
Innovation Solution
A trench power semiconductor device is designed with multiple isolation trench structures between active devices on the same substrate, using polysilicon structures with a floating potential and an insulating layer, eliminating the need for extra long-term thermal oxidation treatment or mask processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power semiconductor components are processed on different chips with thick oxide layers for electrical isolation, then electrical isolation between components is improved, but manufacturing complexity and time increase due to additional processing steps
Solution Approach 1:
The patent combines multiple functions into a single integrated structure. The isolation trench structure integrates both the isolation function (electrically isolating adjacent active devices through the insulating layer) and the trench gate function (controlling device operation through the polysilicon structure extending into the semiconductor layer). This merging eliminates the need for separate thick oxide layer processing while achieving both isolation and device control, thereby reducing manufacturing complexity without compromising electrical isolation reliability.
2Reliability
If power semiconductor components are processed on different chips, then electrical isolation is achieved, but manufacturing cost and time increase
Solution Approach 1:
The patent segments the isolation function from the device structure by introducing dedicated isolation trench structures filled with insulating material. These segmented isolation regions are positioned between adjacent active devices on the same chip, allowing multiple devices to be processed simultaneously on a single substrate without electrical interference. This segmentation enables higher manufacturing efficiency by eliminating the need for separate chip processing while maintaining reliable electrical isolation between devices.
3Reliability
If thick oxide layers are added for electrical isolation, then isolation between devices is improved, but device complexity and processing steps increase
Solution Approach 1:
The isolation trench structure serves multiple functions simultaneously: (1) electrical isolation through the insulating layer, (2) device gate control through the polysilicon structure extending into the semiconductor layer, and (3) structural definition for the active device regions. This multi-functionality eliminates the need for separate thick oxide layer deposition and processing steps, thereby reducing processing time while achieving reliable electrical isolation between adjacent devices on the same chip.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances electrical isolation between active devices without additional processing steps, reducing manufacturing costs and time while allowing for adjustable isolation based on cross voltage requirements.
Implementation Method 1
An insulating layer is interposed between the polysilicon structure and the epitaxial layer
Implementation Method 2
Each of the isolation trench structures includes a polysilicon structure with a floating potential extending from a surface of the epitaxial layer into the epitaxial layer
Data Source
AI summary
A trench power semiconductor device includes a substrate, an epitaxial layer, a drain, a first active device, a second active device, and isolation trench structures. The epitaxial layer and the drain are disposed on two surfaces of the substrate, respectively. The first active device is disposed in a first portion of the epitaxial layer and has a first source and a first gate. The second active device is disposed in a second portion of the epitaxial layer and has a second source and a second gate. The isolation trench structures are disposed between the first portion and the second portion of the epitaxial layer to electrically isolate the first active device and the second active device. Each of the isolation trench structures includes a polysilicon structure with a floating potential and an insulating layer. The insulating layer is between the polysilicon structure and the epitaxial layer.