Trench Structure Geometry for Semiconductor Wafer Bowing Control
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Solution Overview
Problem
Power transistors face challenges in achieving low on-state resistance and high voltage blocking capability without experiencing wafer bowing, which limits their processing and performance in automotive and industrial applications.
Innovation Solution
A semiconductor device design featuring a central portion with a transistor cell array in adjacent trench structures, where the trench segments run parallel to the semiconductor substrate's main surface and include concatenated segments with portions extending in directions different from the primary direction, reducing stress and wafer bowing through optimized trench structure geometry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If trench depths are increased to fulfill voltage blocking requirements, then voltage blocking capability is improved, but wafer bowing occurs which limits processing
Solution Approach 1:
The trench structure is divided into multiple segments (first trench segment, second trench segment, third trench segment) with different orientations. This segmentation allows the stress to be distributed and compensated across different directions, preventing wafer bowing while maintaining the required trench depth for voltage blocking capability.
Solution Approach 2:
The patent employs an asymmetric trench configuration where the first trench segment extends in a first direction, the second trench segment extends in a second direction, and the third trench segment extends in a third direction. This asymmetric multi-directional arrangement creates stress compensation that eliminates wafer bowing while achieving the necessary breakdown voltage.
2Strength
If deep trench structures are used to achieve high voltage blocking, then voltage blocking capability is improved, but manufacturing complexity increases due to processing limits
Solution Approach 1:
By segmenting the trench into multiple oriented sections, the patent enables standard processing techniques to be applied to each segment independently, reducing the complexity of manufacturing deep trenches while maintaining the required voltage blocking performance.
3Ease of manufacture
If traditional linear trench structures are used, then manufacturing is simpler, but stress compensation and wafer bowing prevention are insufficient
Solution Approach 1:
The patent transitions from simple linear trenches to asymmetric multi-directional trenches where segments extend in different directions (first direction, second direction, third direction). This asymmetric configuration provides stress compensation that prevents wafer bowing while remaining manufacturable through adapted processing techniques.
Data Source
AI summary
A semiconductor device includes a central portion and an edge termination portion outside the central portion. The central portion includes a transistor cell array in a semiconductor substrate. Components of transistor cells of the transistor cell array are disposed in adjacent trench structures in the semiconductor substrate. The trench structures run in a first linear direction parallel to a main surface of the semiconductor substrate. The trench structures include a plurality of concatenated trench segments in a plane parallel to the main surface in the central portion, at least one of the trench segments connecting a first point and a second point of one trench structure, the first point and the second point being arranged along the first linear direction. The trench segment comprises a portion extending in a direction different from the first direction.