Trench Semiconductor Gate Structure for Capacitance Optimization
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Solution Overview
Problem
Current trench-type semiconductor devices face challenges in reducing input capacitance and reverse transfer capacitance while increasing output capacitance to enhance gate capacitance characteristics and response speed.
Innovation Solution
A method of manufacturing a trench type semiconductor device involves forming an epitaxial layer, creating a trench with a gate structure comprising an upper and lower gate and an intermediate insulating portion, and using specific layer deposition and etching processes to optimize gate capacitance, including depositing oxide and polysilicon layers, forming spacers, and ion implantation to define source regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional trench-type gate structure is used, then the device structure is simple, but the input capacitance and reverse transfer capacitance cannot be effectively reduced
Solution Approach 1:
The gate structure is divided into an upper gate and a lower gate separated by an intermediate insulating portion. This segmentation allows independent optimization of each gate region, enabling effective reduction of input capacitance and reverse transfer capacitance while maintaining manageable structural complexity through modular design
Solution Approach 2:
The gate structure transitions from a conventional planar configuration to a three-dimensional trench-type structure with vertical stacking. The upper gate, intermediate insulating portion, and lower gate are arranged vertically within the trench, utilizing the depth dimension to achieve superior capacitance characteristics without excessive planar complexity
2Speed
If the gate structure is optimized to reduce input capacitance, then the response speed improves, but the manufacturing process complexity increases
Solution Approach 1:
The intermediate insulating portion is formed within the trench before the upper gate is deposited. This preliminary action establishes the structural framework that guides subsequent gate formation processes, enabling precise positioning and simplifying the overall manufacturing sequence despite the complex final structure
Solution Approach 2:
The upper gate, intermediate insulating portion, and lower gate are nested vertically within the trench structure. This nested arrangement consolidates multiple functional elements into a compact three-dimensional configuration, achieving improved response speed while containing manufacturing complexity through integrated formation processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method effectively reduces input capacitance and reverse transfer capacitance while increasing output capacitance, thereby improving gate capacitance characteristics and response speed, and increasing drain-source breakdown voltage.
Implementation Method 1
an epitaxial layer is formed on a substrate
Implementation Method 2
depositing a first oxide layer in the trench
Implementation Method 3
depositing a first polysilicon layer on the first oxide layer
Implementation Method 4
a step of implanting ions into the epitaxial layer and driving in the ions by heating
Implementation Method 5
oxidizing surfaces of the epitaxial layer and the first polysilicon layer to form a gate oxide layer
Data Source
AI summary
A method of manufacturing a trench type semiconductor device includes the following steps. First, an epitaxial layer is formed on a substrate, then a trench is formed in the epitaxial layer, and a gate structure is formed in the trench. The gate structure includes an upper gate and a lower gate, and an intermediate insulating portion, and the intermediate insulating portion is located in and above the upper gate.