Trench Transistor Surface Doping for Saturation Current Control
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Solution Overview
Problem
Conventional IGBT designs that reduce saturation voltage increase saturation current, making it challenging to achieve low losses in normal operation and prevent damage in overload scenarios.
Innovation Solution
The transistor device includes a semiconductor mesa region with a body region of a first conductivity type and a source region of a second conductivity type, separated by a drift region, and a gate electrode dielectrically insulated from the body region. A surface region with higher doping concentration than the body region is introduced to confine the conducting channel, reducing channel width and saturation current at high load path voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional design measures are used to reduce saturation voltage, then conduction losses are reduced, but saturation current increases
Solution Approach 1:
The patent applies local quality by creating a surface region with higher doping concentration specifically at the mesa region surface, while maintaining lower doping concentration in the bulk body region. This localized doping differentiation allows the surface region to confine the conducting channel effectively, reducing saturation current, while the bulk region maintains low resistance for low conduction losses. The selective doping approach resolves the contradiction by optimizing different regions for different functions.
Solution Approach 2:
The patent changes the doping concentration parameter spatially within the semiconductor structure. By increasing doping concentration in the surface region compared to the bulk body region, the patent modifies the electrical properties locally to confine carriers and reduce saturation current, while maintaining overall low resistance for low conduction losses. This parameter differentiation resolves the technical contradiction between reducing saturation voltage and limiting saturation current.
2Reliability
If saturation current is reduced to prevent damage in overload scenarios, then circuit safety is improved, but conduction losses increase
Solution Approach 1:
The patent uses local quality by implementing a highly doped surface region that specifically targets saturation current reduction for safety, while the bulk region maintains low resistance for efficient conduction. The surface region acts as a carrier confinement zone that limits saturation current to safe levels, preventing circuit damage during overloads, while not significantly impacting normal conduction losses.
Solution Approach 2:
The patent segments the body region into a surface region and a bulk region with different doping concentrations. The surface region is optimized for safety by confining carriers and limiting saturation current, while the bulk region is optimized for efficiency with low resistance. This segmentation allows independent optimization of safety and conduction performance, resolving the contradiction between reliability and energy loss.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively adjusts saturation current by confining the channel to the source region, reducing saturation current and maintaining low conduction losses even at high load path voltages, thereby minimizing the risk of damage in overload scenarios.
Implementation Method 1
In the on-state of the IGBT the gate electrode generates a conducting channel in the body region between the emitter region and the drift region
Implementation Method 2
the collector region injects charge carriers of a second conductivity type into the drift region, with the charge carriers of the first and second conductivity types forming a charge carrier plasma in the drift region
Data Source
AI summary
A transistor device includes a semiconductor mesa region between first and second trenches in a semiconductor body, a body region of a first conductivity type and a source region of a second conductivity type in the semiconductor mesa region, a drift region of the second conductivity type in the semiconductor body, and a gate electrode adjacent the body region in the first trench, and dielectrically insulated from the body region by a gate dielectric. The body region separates the source region from the drift region and extends to the surface of the semiconductor mesa region adjacent the source region. The body region comprises a surface region which adjoins the surface of the semiconductor mesa region and the first trench. The surface region has a higher doping concentration than a section of the body region that separates the source region from the drift region.