TRIAC-Based Memory Structure for Disturbance Suppression

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Solution Overview

Problem

Memory array structures composed of memory cells and diodes, such as MRAMs, face disturbances during operations like writing, erasing, and reading, leading to incorrect data manipulation in non-selected memory cells.

Innovation Solution

A memory structure utilizing a triode for alternating current (TRIAC) with a semiconductor layer and gate electrode, where the memory cell is electrically connected to the TRIAC, allowing for bidirectional or unidirectional operations, and specific voltage applications to perform write, erase, and read operations while minimizing disturbances to non-selected cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a diode is used as a selective device in memory array structure, then the memory cell can be protected from other memory cells, but disturbance still occurs to non-selected memory cells during write, erase, or read operations

Engineering Contradiction:
Improvedata integrityVSAvoiddisturbance to non-selected memory cells
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the electrical parameters of the selective device by using a TRIAC instead of a diode. The TRIAC can dynamically adjust its resistance state between high-resistance (blocking) and low-resistance (conducting) states through gate control, enabling precise control of current flow to selected memory cells while maintaining high blocking capability for non-selected cells, thus eliminating disturbance issues.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The TRIAC introduces dynamic control capability to the selective device. Unlike a passive diode, the TRIAC can be actively controlled through its gate terminal to switch between conducting and blocking states, allowing the memory structure to dynamically isolate non-selected cells during operations and only activate the selected cell when needed.

Inventive Principle:
Principle #15Dynamics

2Reliability

If a TRIAC is used in memory structure, then leakage currents are suppressed and electrical characteristics are enhanced, but device complexity increases

Engineering Contradiction:
Improveelectrical characteristicVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The TRIAC serves multiple functions within the memory structure: it acts as a selective device for current direction control, a switch for isolating non-selected cells, and a protection element against leakage currents. This multi-functionality reduces the need for additional separate components, thereby managing device complexity while achieving superior electrical characteristics.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If bidirectional operation memory cell is used, then operation flexibility is improved, but sensitivity to disturbance increases

Engineering Contradiction:
Improveoperation flexibilityVSAvoidsensitivity to disturbance
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The TRIAC acts as an intermediary between the bidirectional operation memory cell and the external circuitry. It controls and filters the current flow in both directions, allowing the memory cell to operate bidirectionally while the TRIAC blocks or suppresses any harmful disturbance or leakage currents that could affect the cell's sensitive state.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The TRIAC-based memory structure effectively suppresses leakage currents and avoids disturbances to non-selected memory cells, enhancing electrical characteristics and integration density, and allowing precise operations on selected memory cells.

Implementation Method 1

The semiconductor layer is disposed on the first terminal and includes a first doped layer, a second doped layer, a third doped layer, a first doped region, a second doped region and a third doped region. The first doped layer and the third doped layer are a first conductive type, the second doped layer, the first doped region, the second doped region and the third doped region are a second conductive type

Methodology Applied
Scientific EffectConduction (electrical): Conduction (electrical)

Data Source

PatentUS9461156B2Memory structrue and operation method thereof
Publication Date: 2016.10.04 POWERCHIP SEMICON MFG CORP
  • US9461156B2 patent drawing
  • US9461156B2 patent drawing
  • US9461156B2 patent drawing

AI summary

This invention provides a memory structure and an operation method thereof. The memory structure includes a triode for alternating current (TRIAC) and a memory cell. The memory cell is electrically connected to the TRIAC.