Tri-Gate Non-Volatile Latch Layout With Shared Current Path
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Solution Overview
Problem
Existing non-volatile latch cells require a large layout area and complex signal management, with potential for undesirable operational modes due to transistor mismatch and high voltage reliance.
Innovation Solution
The design incorporates a latch circuit with two tri-gate non-volatile devices sharing a common current path, each with MOS transistors and a charge-trapping nitride layer, and includes a cross-coupled PMOS transistor circuit for robustness, reducing the layout area and voltage requirements while ensuring reliable logic state determination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional non-volatile latch circuits are used, then non-volatile storage function is achieved, but layout area becomes large and device complexity increases
Solution Approach 1:
The patent merges multiple transistor functions into a compact tri-gate device structure where three transistors share common source and drain regions. This consolidation reduces the overall layout area while maintaining the non-volatile storage function through the charge-trapping nitride layer in the tri-gate device.
Solution Approach 2:
The tri-gate device serves multiple functions simultaneously: it acts as a non-volatile memory element, a switching device, and a logic element. The charge-trapping nitride layer enables non-volatile storage, while the tri-gate structure provides efficient switching and logic operations, reducing the need for separate dedicated components.
2Reliability
If traditional non-volatile latch circuits are used, then non-volatile storage function is achieved, but device complexity and signal management become complicated
Solution Approach 1:
The patent extracts and eliminates the need for high voltage signals and complex multi-mode control circuits from the traditional latch design. The tri-gate device with charge-trapping nitride layer achieves non-volatile storage using only standard voltage levels, removing the complexity of high voltage signal management and mode-dependent operation.
Solution Approach 2:
The invention changes the operational parameters from requiring high voltages and multiple modes to operating at standard voltage levels with simplified logic control. The charge-trapping mechanism enables non-volatile storage at conventional voltages, and the tri-gate structure provides adequate switching behavior without complex mode management.
3Reliability
If traditional non-volatile latch circuits are used, then non-volatile storage is achieved, but power consumption increases
Solution Approach 1:
The tri-gate device with charge-trapping nitride layer provides non-volatile storage without requiring continuous power or complex refresh circuits. The trapped charge maintains the stored state indefinitely without power consumption, eliminating the need for continuous energy input to maintain the non-volatile state.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the layout area and eliminates the need for high voltage signals, providing a more efficient and reliable non-volatile latch solution with improved robustness and reduced power consumption.
Implementation Method 1
a third transistor including a charge-trapping nitride layer
Data Source
AI summary
A latch circuit and method includes providing a first tri-gate non-volatile device, providing a second tri-gate non-volatile device, coupling the first tri-gate non-volatile device to the second tri-gate non-volatile device, erasing the first tri-gate non-volatile device, programming the second tri-gate non-volatile device, and latching an output node of the latch device to a logic state determined by respective thresholds of the first and second tri-gate non-volatile devices. Coupling the first tri-gate non-volatile device to the second tri-gate non-volatile device can include direct coupling, or indirect coupling through a cross-coupled circuit.