Triple-Damascene Interposer for 3D IC Stacking
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Solution Overview
Problem
Existing interposer technologies face limitations in creating efficient three-dimensional stacked structures for integrated circuits, as they struggle to provide flexible and thin interconnects between different ICs and subsystems, such as MEMS and PCBs, with varying pad layouts, while maintaining precision and reducing processing steps.
Innovation Solution
The use of a dual-damascene interposer with a thin silicon substrate and Through-Silicon Vias (TSV) that employs damascene processing to create conductive vias and interconnects, allowing for simultaneous formation of both top and bottom interconnects, reducing thickness and increasing flexibility, and accommodating diverse materials and technologies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If traditional interposer technologies are used to connect integrated circuits, then interconnections between ICs can be established, but the structure becomes thick and rigid, reducing flexibility and making complex routing difficult
Solution Approach 1:
The patent employs thin film interconnect structures and flexible substrate materials to create a thin, flexible interposer. The use of deposited metal layers (such as copper or aluminum) on a thin substrate enables both reduced thickness and maintained flexibility, directly resolving the contradiction between thinness and flexibility.
Solution Approach 2:
The patent utilizes three-dimensional stacked architecture where multiple ICs are connected vertically through the thin interposer. This dimensional approach allows complex routing to be achieved in the vertical dimension rather than requiring a thick horizontal structure, enabling flexibility while maintaining thinness.
2Manufacturing precision
If multiple processing steps are used to create precise interconnects, then manufacturing precision is improved, but manufacturing complexity and processing time increase
Solution Approach 1:
The patent combines multiple interconnect formation operations into integrated processing sequences. By merging the formation of through-substrate vias, metal interconnect layers, and insulation layers into a coordinated multi-step deposition and etching process, the patent achieves high precision while managing complexity through systematic integration of steps.
Solution Approach 2:
The patent performs preliminary patterning and deposition steps to pre-form interconnect structures before final assembly. Through-substrate vias and metal traces are pre-formed with precise dimensions and positions, allowing subsequent assembly steps to proceed with simpler, less precise operations, thereby maintaining overall precision while reducing final processing complexity.
Data Source
AI summary
This interposer provides interconnections between stacked layers of circuits, which may include integrated circuits, PC boards, and hybrid substrates. Fabricated as an integrated circuit itself using readily available process steps, this interposer uses single and dual-damascene layers to increase the density of usable interconnections on both its top and bottom surfaces. Access from a top surface to a bottom surface is provided by conductive through-vias that may be placed at a high density. For even greater density, interconnections may be routed within silicon trenches, while damascene processing reduces the total number of steps required for fabrication. The described techniques may be used to create double-sided integrated circuits.