Triple Patterning Metal Layer Recoloring for 10nm Standard Cells
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Solution Overview
Problem
Current photolithography techniques, such as double patterning, face challenges in forming smaller dimensions and denser standard cell layouts for semiconductor devices, leading to 'color' conflicts and design rule violations, especially in 10 nm or lower integrated circuit designs, which complicates the reproduction of complex circuit patterns and reduces lithographic printability.
Innovation Solution
Implementing a triple patterning process that uses three distinct patterning processes to form metal features of different 'colors', allowing for the re-coloring of metal structures to avoid conflicts and enable closer feature placement without violating spacing rules, thereby improving the density and scalability of semiconductor device designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If double patterning is used to form metal features, then the feature size can be reduced, but color conflicts and design rule violations occur in dense layouts
Solution Approach 1:
The patent segments the metal layer formation into three distinct patterning processes (triple patterning) instead of two, dividing the dense metal pattern into three separate color groups. This segmentation allows each color to be formed with adequate spacing while achieving overall higher density, eliminating color conflicts that occur with double patterning in 10nm and below node designs.
Solution Approach 2:
The patent introduces an additional dimension to the patterning process by adding a third color group beyond the traditional two-color double patterning scheme. This dimensional expansion in the patterning methodology provides additional design space and flexibility, enabling compliant routing and spacing in ultra-dense standard cell layouts that cannot be achieved with only two colors.
2Quantity of substance
If feature density is increased in standard cells, then circuit functionality is improved, but color conflicts increase and routing becomes more difficult
Solution Approach 1:
By segmenting the metal features into three distinct color groups through triple patterning, the patent enables higher feature density while maintaining proper spacing within each color group. This segmentation strategy allows more features to be packed into standard cells without creating color conflicts, thereby increasing functionality while managing layout complexity.
Solution Approach 2:
The patent changes the fundamental parameter of patterning from two-color to three-color methodology. This parameter change in the patterning process enables increased feature density in standard cells by providing an additional color dimension for conflict-free placement, allowing more transistors and interconnects to be integrated without violating design rules.
3Adaptability or versatility
If triple patterning is used to form metal features, then color conflicts are reduced and feature placement flexibility is improved, but the patterning process complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the metal patterning into three sequential color formation processes. This segmentation provides greater adaptability and versatility in feature placement, allowing designers to optimize standard cell layouts with enhanced flexibility. While the process is divided into more steps, each step remains relatively simple and can be integrated into existing manufacturing flows.
Solution Approach 2:
The triple patterning methodology serves as a universal solution for forming compliant metal patterns across all standard cell types and density requirements. This multi-functional approach can be applied universally to achieve color-conflict-free routing and placement in various circuit designs, providing a scalable methodology that adapts to different design needs while maintaining process compatibility.
Data Source
AI summary
At least one method, apparatus and system disclosed herein for forming a semiconductor device comprising a plurality of cells having metal features formed using triple patterning processes. An overall pattern layout is created for a first cell that is to be manufactured using a triple patterning process for forming a plurality of metal features on a metal layer. A first color metal feature is formed in the metal layer. The first color metal feature is associated with a first patterning process of the triple patterning process. A second color metal feature is formed in the metal layer. The second color metal feature is associated with a second patterning process of the triple patterning process. A third color metal feature is formed in the metal layer. The third color metal feature is associated with a third patterning process of the triple patterning process. At least one of the first, second, and third color metal features is re-colorable.