Trit-based Time Tracking for NVM Demarcation Voltage Selection

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Solution Overview

Problem

Non-volatile memory (NVM) technologies face challenges in accurately reading memory cells over time due to threshold voltage drift, requiring different demarcation voltages for recent and distant write operations, which complicates data retrieval and storage efficiency.

Innovation Solution

The use of trits for time tracking, where a timer index, timestamp, and individual state are combined to determine the elapsed time since a write operation, allowing for the selection of appropriate demarcation voltages (VDM1 or VDM2) based on a coarse timer granularity, reducing storage needs and ensuring accurate data retrieval.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If different demarcation voltages are used for recent and distant write operations, then reading accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvereading accuracyVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The system pre-calculates and stores multiple demarcation voltages (VDM1, VDM2, etc.) corresponding to different time intervals before actual read operations occur. When a write operation occurs, the system pre-determines which demarcation voltage will be needed based on the expected read time, and prepares the appropriate voltage level in advance. This eliminates the need for complex real-time calculations during read operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically selects different demarcation voltages based on the elapsed time since the write operation. The demarcation voltage is not fixed but changes adaptively according to the time interval, allowing the system to optimize reading accuracy for both recent and distant write operations without requiring a single complex voltage adjustment mechanism.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If fine timer granularity is used for accurate time tracking, then time measurement precision is improved, but storage requirements increase

Engineering Contradiction:
Improvetime measurement precisionVSAvoidstorage requirements
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

Instead of using full-precision timestamps for every memory cell, the system uses coarse timer granularity (e.g., 1 millisecond intervals) that provides sufficient precision for selecting demarcation voltages without requiring excessive storage. The system applies partial precision where needed (for demarcation voltage selection) and accepts coarser precision where excessive precision would waste storage resources.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system changes the time tracking parameter from fine-grained timestamps to coarse-grained timer indices. By using timer indices with larger intervals (e.g., 1ms, 10ms, or 100ms granularity), the system reduces the number of bits required to store time information while still maintaining enough precision to distinguish between different demarcation voltage requirements.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10163471B2Time tracking with trits
Publication Date: 2018.12.25 TAHOE RES LTD
  • US10163471B2 patent drawing
  • US10163471B2 patent drawing
  • US10163471B2 patent drawing

AI summary

A memory controller circuitry includes a timestamp circuitry and a demarcation voltage (VDM) selection circuitry. The timestamp circuitry is to capture a global timer index from a global timer having a granularity, G. The timestamp circuitry is further to fetch a timestamp for a memory block that includes a group of sub-blocks that includes a target sub-block. The demarcation voltage (VDM) selection circuitry is to fetch a combined count from a count store. The combined count represents a combined state. The combined state includes a target individual state of the target sub-block and a respective individual state of each of at least one other sub-block of the group of sub-blocks included in the memory block.