TSV Buffering Structures to Prevent Metal Gate Residue and Arcing

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Solution Overview

Problem

The formation of through silicon vias (TSVs) in semiconductor devices can lead to issues such as metal gate residue and arcing due to the presence of conductive materials in dummy devices, which can damage fabrication tools and affect the integrity of the device structure.

Innovation Solution

The introduction of buffering structures, such as polycrystalline fins, is employed to prevent incomplete removal of conductive materials during the continuous poly on oxide definition process, thereby preventing metal gate residue and arcing, while guard rings provide protection against moisture and stress.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conductive materials are present in dummy devices during TSV formation, then device functionality is maintained, but metal gate residue and arcing occur causing tool damage and structural integrity issues

Engineering Contradiction:
Improvedevice functionalityVSAvoidmetal gate residue and arcing
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent removes conductive materials from dummy devices in the TSV region by implementing a selective removal process. The method extracts only the necessary conductive elements while leaving functional devices intact, thereby eliminating the source of metal gate residue and arcing problems without compromising overall device functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies different material properties to different regions: functional devices retain their conductive materials while dummy devices in the TSV region have conductive materials removed. This local differentiation allows the system to maintain functionality where needed while preventing harmful effects in specific areas through selective material presence or absence.

Inventive Principle:
Principle #3Local quality

2Productivity

If continuous poly on oxide definition process is used, then TSV formation is accelerated, but incomplete removal of conductive materials occurs leading to process non-uniformity

Engineering Contradiction:
ImproveTSV formation speedVSAvoidconductive material removal completeness
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent divides the conductive material removal process into multiple sequential steps with different etchants. The first etching step removes conductive materials from dummy devices, followed by a second step that completes the removal and ensures uniformity. This segmented approach maintains high productivity while achieving complete and consistent material removal throughout the structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary removal of conductive materials from dummy devices before final TSV completion steps. By anticipating and addressing potential incomplete removal issues in advance through multiple etching steps, the process ensures uniformity is achieved before subsequent fabrication steps occur.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If guard rings are added to protect against moisture and stress, then device integrity is improved, but device complexity increases

Engineering Contradiction:
Improvedevice integrityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The guard rings serve multiple functions simultaneously: they provide mechanical stress relief, act as moisture barriers, and function as electrical isolation structures. By combining these protective functions into a single structural element, the patent improves device integrity without proportionally increasing complexity, as the same structure delivers multiple protective benefits.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260052964A1Semiconductor devices and methods for fabrication thereof
Publication Date: 2026.02.19 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20260052964A1 patent drawing
  • US20260052964A1 patent drawing
  • US20260052964A1 patent drawing

AI summary

Embodiments of the present disclosure provide a method for forming TSV structures. In some embodiments, buffering structures are formed adjacent dummy devices in the TSV region. By introducing buffering structures adjacent the end gate structures of the dummy device in the TSV region, residual metallic material may be eliminated, thereby, avoiding arcing in fabrication of TSV structures.