TSV Defect Detection in 3D Semiconductor Stacks
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Solution Overview
Problem
Existing 3D semiconductor apparatuses face challenges in accurately detecting and repairing defects in through-silicon vias (TSVs), such as voids, bump contact failures, and cracks, which disrupt electrical connections between stacked chips, necessitating efficient testing methods to ensure normal functionality.
Innovation Solution
A semiconductor apparatus and method that applies a test voltage to TSVs through a test voltage application unit, outputs test signals from first and second pads, and converts these signals into digital logic signals for determination, allowing for simultaneous testing of multiple TSVs without the need for additional test devices, thereby improving detection efficiency and reducing test time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional testing methods are used to detect TSV defects, then measurement precision can be achieved, but device complexity and test time increase due to the need for additional external test devices
Solution Approach 1:
The patent merges the testing function into the semiconductor apparatus itself by integrating test voltage application units and test signal output units. The test voltage application unit applies test voltages to TSVs through test mode signals, and the test signal output units output test signals from TSVs to pads, eliminating the need for separate external test devices while maintaining detection accuracy.
Solution Approach 2:
The semiconductor apparatus is designed to perform both its primary function of electrical connection between stacked chips and the secondary function of self-testing. The same apparatus structure that connects chips also contains the test voltage application unit and test signal output units, allowing the device to serve multiple purposes without requiring additional specialized equipment.
2Reliability
If comprehensive testing of multiple TSVs is performed, then reliability of defect detection improves, but test time increases
Solution Approach 1:
The patent segments the testing process into parallel operations by dividing TSVs into multiple ranks and assigning different test signal output units to each rank. The first test signal output unit handles TSVs of the first rank while the second test signal output unit handles TSVs of the second rank, allowing simultaneous testing of multiple TSVs without sequential delays.
Solution Approach 2:
The testing operation continues without interruption by applying test voltages to TSVs of different ranks simultaneously through different output units. The test voltage application unit continuously applies test voltages while multiple test signal output units continuously output test signals from different TSV ranks, maintaining continuous useful action throughout the testing process.
Data Source
AI summary
A semiconductor apparatus includes a test voltage application unit, a first pad and a second pad. The test voltage application unit is configured to apply a test voltage to first and second TSVs in response to a test mode signal. The first pad is configured to output a first test signal outputted from the first TSV. And the second pad is configured to output a second test signal outputted from the second TSV.