Multi-Die Module TSV Interconnects for Speed and Reliability
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Solution Overview
Problem
Existing vertically stacked integrated circuit dies face limitations in interconnect speed due to large surface area micro-bumps, which add capacitance and hinder data processing efficiency in small portable devices.
Innovation Solution
The implementation of through-silicon via (TSV) technology with micro-bump and TSV landing pads, allowing for selective access and communication between dies using a selector circuit to optimize data transfer rates and reduce capacitance, enabling faster data processing and lower power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If micro-bumps with large surface area are used to electrically connect vertically stacked die, then reliable electrical connection is achieved, but capacitance increases which limits interconnect speed
Solution Approach 1:
The patent applies local quality by providing two different types of landing pads with different characteristics: micro-bump landing pads with larger surface area for reliable connections, and TSV landing pads with smaller surface area for faster interconnect speed. The system selectively uses different landing pad types in different locations to optimize both reliability and speed locally throughout the die stack.
Solution Approach 2:
The patent segments the electrical connection interface into two distinct types: micro-bump connections for reliable but slower connections, and TSV connections for faster but potentially less robust connections. This segmentation allows the system to use the appropriate connection type for different signal requirements, resolving the contradiction between reliability and speed.
2Volume of moving object
If vertically stacked die configuration is used to reduce interconnect distances, then smaller device size and lower power consumption are achieved, but capacitance from micro-bumps limits data processing efficiency
Solution Approach 1:
The patent applies local quality by providing two different types of landing pads with different characteristics: micro-bump landing pads with larger surface area for reliable connections, and TSV landing pads with smaller surface area for faster interconnect speed. The system selectively uses different landing pad types in different locations to optimize both reliability and speed locally throughout the die stack.
Solution Approach 2:
The patent introduces dynamic selectability through selector circuits that can dynamically choose between micro-bump and TSV connection paths based on signal requirements. This dynamic capability allows the system to optimize data processing efficiency by routing time-critical signals through the lower-capacitance TSV paths while maintaining reliable connections for other signals.
3Speed
If TSV landing pads with smaller surface area are used, then capacitance is reduced and interconnect speed is improved, but manufacturing complexity increases due to selective access requirements
Solution Approach 1:
The patent applies universality by designing a common die structure that incorporates both micro-bump and TSV landing pads, allowing the same die design to support multiple connection types. This multi-functional approach enables selective access to different landing pad types without requiring entirely different die designs, thereby reducing manufacturing complexity while maintaining the speed benefits of TSV connections.
Data Source
AI summary
A data processing system includes a processing unit that forms a base die and has a group of through-silicon vias (TSVs), and is connected to a memory system. The memory system includes a die stack that includes a first die and a second die. The first die has a first surface that includes a group of micro-bump landing pads and a group of TSV landing pads. The group of micro-bump landing pads are connected to the group of TSVs of the processing unit using a corresponding group of micro-bumps. The first die has a group of memory die TSVs. The subsequent die has a first surface that includes a group of micro-bump landing pads and a group of TSV landing pads connected to the group of TSVs of the first die. The first die communicates with the processing unit using first cycle timing, and with the subsequent die using second cycle timing.