TSV Structure with Multi-Level Pad Contact for IC Reliability
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Integrated circuit (IC) devices with through-silicon via (TSV) structures face challenges in maintaining electrical properties and reliability due to contact failures and thermal expansion differences between materials, leading to bonding resistance issues and potential physical impacts during annealing processes.
Innovation Solution
The IC device incorporates a TSV structure that contacts multiple conductive pad layers at different levels, including upper, middle, and lower layers, with through holes and sidewall contacts to increase bonding areas and reduce resistance, and features a staircase-shaped bottom surface to alleviate contact failures and enhance structural stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a TSV structure contacts multiple conductive pad layers at different levels, then bonding resistance decreases and electrical reliability improves, but device complexity increases
Solution Approach 1:
The TSV structure extends vertically through multiple interlayer insulating layer structures to contact conductive pad layers at different height levels. This three-dimensional vertical arrangement allows electrical connection across multiple layers without increasing planar footprint, thereby improving electrical reliability while managing device complexity through spatial optimization
Solution Approach 2:
The TSV structure is nested within the stacked configuration of multiple interlayer insulating layer structures and conductive pad layers. The via penetrates through successive layers, with each layer containing conductive elements that are vertically aligned and electrically connected through the TSV, creating a nested hierarchical structure that achieves multi-layer connectivity
2Reliability
If through holes are formed in conductive pad layers to increase bonding area, then bonding resistance decreases, but manufacturing precision requirements increase
Solution Approach 1:
Through holes are pre-formed in the conductive pad layers at designated positions before final assembly and bonding. This preliminary preparation ensures proper alignment and contact areas are established in advance, reducing the precision demands during subsequent bonding operations and maintaining manufacturing feasibility
Solution Approach 2:
The through holes act as intermediary structures that facilitate electrical contact between the TSV and conductive pad layers. By providing predetermined contact pathways with controlled dimensions and positions, the through holes mediate the connection process, reducing the overall precision requirements for the bonding operation
3Reliability
If the TSV structure has an inverted T shape to contact sidewalls of conductive pad layers, then bonding area increases and contact failures reduce, but device complexity increases
Solution Approach 1:
The TSV structure employs an inverted T shape configuration where the via width varies along its length, with wider sections positioned to contact the sidewalls of conductive pad layers. This asymmetric geometry provides enhanced contact areas at specific locations without requiring uniform expansion throughout the entire via structure, thereby improving reliability while limiting complexity increase
4Productivity
If multiple interlayer insulating layer structures are stacked, then integration density increases, but thermal expansion differences cause bonding resistance issues
Solution Approach 1:
The patent applies different material properties to different regions of the stacked structure. Specific interlayer insulating layer structures or conductive pad layers are selected with thermal expansion coefficients that compensate for cumulative thermal expansion differences across the stack. This local optimization of material properties mitigates bonding resistance issues while maintaining high integration density through vertical stacking
Data Source
AI summary
An integrated circuit (IC) device includes a first substrate and a first structure on a front surface of the first substrate. The first structure includes a first interlayer insulating layer structure including a plurality of first conductive pad layers spaced apart from one another at different levels of the first interlayer insulating layer structure. The IC device includes a second substrate on the first substrate and a second structure on a front surface of the second substrate, which faces the front surface of the first substrate. The second structure includes a second interlayer insulating layer structure bonded to the first interlayer insulating layer structure. A through-silicon via (TSV) structure penetrates the second substrate and the second interlayer insulating layer structure. The TSV structure is in contact with at least two first conductive pad layers of the plurality of first conductive pad layers located at different levels.