Through Silicon Vias with Multiple Diameters via Depth Control
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Solution Overview
Problem
Existing methods for fabricating through silicon vias (TSVs) with multiple diameters are inefficient, adding cost, complexity, and time due to the need for additional mask layers and patterning steps, which hinders the advancement of 3D wafer stacking technology in microelectronics.
Innovation Solution
A method involving patterning a photoresist layer on a substrate, etching to form cavities of varying depths, and using spacer materials to expose conductors, allowing for the formation of TSVs with multiple diameters through controlled etching processes, such as reactive ion etching and chemical mechanical planarization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional methods with additional mask layers and patterning steps are used to form TSVs with multiple diameters, then TSV fabrication is achieved, but manufacturing cost, process complexity, and fabrication time increase
Solution Approach 1:
The photoresist layer is divided into multiple portions that are selectively removed to expose different areas of the substrate at different depths. This segmentation allows formation of TSVs with multiple diameters without requiring additional mask layers, as each photoresist portion can be independently patterned and removed to define via openings of different sizes at different locations
Solution Approach 2:
The patent introduces depth as an additional dimension for controlling via diameter. By etching to different depths and selectively removing different portions of the photoresist layer at different depth levels, the method creates TSVs with varying diameters along the depth dimension, eliminating the need for additional lateral mask layers
2Manufacturing precision
If traditional methods with additional mask layers are used to form TSVs with multiple diameters, then TSV fabrication is achieved, but manufacturing time and cost increase
Solution Approach 1:
Multiple functions are merged into a single photoresist layer: it serves as both the patterning mask and the depth-selective removal target. The same photoresist layer is used to define all via openings of different diameters through selective removal of different portions, combining what would traditionally require multiple separate mask layers into one unified process
Solution Approach 2:
The photoresist layer is applied and patterned in advance to define all desired via openings before any etching occurs. This preliminary patterning establishes the complete diameter profile for all TSVs, allowing subsequent etching and selective photoresist removal to proceed efficiently without requiring additional patterning steps during the via formation process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach simplifies the fabrication process, reducing costs and complexity while enabling more efficient formation of TSVs with multiple diameters, enhancing the integration and performance of 3D integrated circuits.
Implementation Method 1
patterning a photoresist layer on a substrate of a structure
Implementation Method 2
etching to form cavities of varying depths, and using spacer materials to expose conductors, allowing for the formation of TSVs with multiple diameters through controlled etching processes, such as reactive ion etching
Implementation Method 3
depositing a spacer material along sidewalls of the cavity to define an opening having a second area
Implementation Method 4
controlled etching processes, such as reactive ion etching and chemical mechanical planarization
Data Source
AI summary
A method is disclosed which includes patterning a photoresist layer on a substrate of a structure, removing a first portion of the photoresist layer to expose a first area of the substrate, etching the first area to form a cavity having a first depth, removing a second portion of the photoresist to expose an additional area of the substrate, and etching the cavity to expose a first conductor in the structure and the additional area to expose a second conductor in the structure.