TSV Plug Alignment and Irregular Spacing for Semiconductor Reliability
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Solution Overview
Problem
The integration density of semiconductor devices has increased, leading to challenges in the reliable placement and alignment of through-substrate via (TSV) plugs, which can cause stress and result in cracks and delamination between TSV plugs and solder balls or pillars, affecting the reliability of semiconductor devices.
Innovation Solution
The TSV plugs are vertically aligned with the central regions of solder balls or pillars, overlapping 70% or less of their diameters, and are irregularly arranged to avoid overlapping with outer regions, reducing stress and preventing cracks and delamination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If TSV plugs are vertically aligned with solder balls or pillars, then electrical connection is improved, but stress concentration and cracks may occur
Solution Approach 1:
The patent applies local quality by creating different overlap ratios for different TSV plugs. Specifically, first TSV plugs have a first overlap ratio with their corresponding solder balls or pillars, while second TSV plugs have a second overlap ratio that is different from the first. This localized variation in geometric parameters allows different regions of the device to have optimized stress distribution characteristics, preventing uniform stress concentration while maintaining electrical connectivity.
2Manufacturing precision
If TSV plugs are arranged regularly, then manufacturing precision is improved, but stress distribution is worsened leading to delamination
Solution Approach 1:
The patent implements asymmetry by arranging TSV plugs at irregular intervals rather than in a regular pattern. The distance between adjacent TSV plugs varies, creating an asymmetric distribution that prevents uniform stress concentration. This asymmetric arrangement, combined with varied overlap ratios, effectively distributes mechanical stress throughout the package structure, preventing delamination while still achieving precise alignment for electrical connection.
3Ease of manufacture
If TSV plugs overlap outer regions of solder balls, then alignment is simplified, but stress concentration increases causing cracks
Solution Approach 1:
The patent applies parameter changes by controlling and optimizing the overlap ratio between TSV plugs and solder balls or pillars. Instead of using fixed or maximal overlap, the patent specifies that the overlap ratio should be within a particular range (30-70% of the solder ball or pillar diameter). This parameter optimization balances alignment ease with stress reduction, preventing crack formation while maintaining manufacturability.
Data Source
AI summary
Provided is a semiconductor package including a package substrate having lands, a first semiconductor device mounted on the package substrate and having a bottom surface on which first lines are disposed, and solder balls respectively electrically connected to the lands of the package substrate with the first lines of the first semiconductor device. The first semiconductor device includes a first substrate, and through-substrate via (TSV) plugs that vertically pass through the first substrate. The TSV plugs are respectively vertically aligned with the first lines, overlap first regions corresponding to 70% or less of diameters of the solder balls from central axes of the solder balls, and do not overlap second regions corresponding to the remaining 30% or more of diameters of the solder balls from the central axes of the solder balls. Adjacent ones of the TSV plugs are arranged at irregular intervals with respect to each other.