TSV Protrusion Enhances Semiconductor Package Reliability
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Solution Overview
Problem
The complexity of specific routing lines in through-silicon via (TSV) structures complicates circuit design, especially in dual-die stacking, leading to reduced reliability of semiconductor package structures due to potential separation of connecting structures under stress.
Innovation Solution
A semiconductor package structure and method where a TSV penetrates the substrate with end portions protruding from passivation layers, creating a tenon-like feature that allows connecting structures to be fixed securely, enhancing reliability by forming a stair-step opening and using a metallic layer and connecting structures to surround the TSV end portions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If TSV penetrates the substrate completely through front surface to back surface, then electrical connection between chips is achieved, but connecting structures may separate under stress reducing reliability
Solution Approach 1:
The TSV structure transitions from a planar 2D connection to a 3D protruding structure. The TSV extends beyond the substrate surface into the passivation layer, creating a vertical dimension that allows connecting structures to envelop the TSV end portion, forming a tenon-mortise joint that resists separation forces.
Solution Approach 2:
The connecting structure is designed to surround and nest around the protruding end portion of the TSV. The metallic layer and connecting structure form concentric layers that envelop the TSV, creating a nested configuration where the connecting structure acts as a protective shell around the TSV tenon.
2Reliability
If specific routing lines are designed and formed to serve as terminals for TSVs, then electrical connection is achieved, but circuit design becomes complicated
Solution Approach 1:
The protruding TSV end portion serves multiple functions: it acts as an electrical conductor, a mechanical anchor for connecting structures, and a standardized interface for chip stacking. This universal structure eliminates the need for complex specific routing lines, as the TSV itself becomes the terminal.
Solution Approach 2:
The TSV structure is segmented into distinct functional zones: the embedded portion within the substrate for electrical connection, and the protruding end portion within the passivation layer for mechanical connection. This segmentation allows the TSV to serve dual purposes without requiring additional routing complexity.
Data Source
AI summary
The present disclosure provides a semiconductor package structure. The semiconductor package structure includes a substrate having a front surface and a back surface opposite to the front surface, an interconnection structure disposed over the front surface of the substrate, a first passivation layer disposed over the back surface of the substrate, a second passivation layer disposed over the first passivation layer, and a TSV disposed in the substrate. In some embodiments, the TSV structure penetrates the substrate from the back surface of the substrate to the front surface of the substrate. In some embodiments, the TSV has an end portion protruding from the first passivation layer and separated from the second passivation layer.