TSV Test Circuit Phase Detection for 3D IC Fault Diagnosis
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Solution Overview
Problem
Existing IC technologies face challenges in diagnosing and addressing defective or malfunctioning through-silicon vias (TSVs) in 3D ICs, where a single defective TSV can render the entire IC non-functional, and current methods are inefficient and costly for structural diagnosis.
Innovation Solution
An IC with a TSV test circuit and method that uses a phase detector to determine phase differences between signals passed through TSVs, allowing for identification of defective TSVs and implementation of remedial measures such as substitution with redundant TSVs or delay compensation using delay-locked loops or phase calibrators.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional structural diagnosis methods are used for TSVs, then manufacturing precision can be maintained, but device complexity and cost increase significantly
Solution Approach 1:
The patent replaces complex mechanical/structural diagnosis methods with an electrical phase detection system. By injecting test signals through TSVs and measuring phase differences electrically, the system achieves accurate TSV functionality diagnosis without complex structural analysis, thereby reducing device complexity while maintaining diagnostic precision
Solution Approach 2:
The patent changes the diagnosis parameter from structural measurements to electrical phase difference measurements. By monitoring phase shifts in test signals passing through TSVs, the system can detect TSV defects efficiently, simplifying the diagnosis mechanism while maintaining high precision in identifying TSV issues
2Measurement precision
If phase detection method is implemented, then TSV fault detection precision improves, but device complexity increases due to additional test circuits
Solution Approach 1:
The patent designs the phase detection circuit to serve multiple functions: normal signal transmission, test signal injection, and phase difference measurement. By making the test circuit multi-functional, the patent reduces the need for separate dedicated test structures, thereby improving fault detection precision while minimizing the increase in device complexity
Solution Approach 2:
The patent introduces a phase detector as an intermediary component that compares the phase of test signals before and after they pass through TSVs. This intermediary device enables precise fault detection by translating complex TSV conditions into simple phase difference measurements, achieving high detection accuracy without requiring overly complex circuitry
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient fault correction and signal routing by accurately diagnosing TSV conditions, preventing performance degradation or failure due to signal delays and facilitating cost-effective maintenance in 3D ICs.
Implementation Method 1
The phase detector may be configured to determine a phase difference between a signal at the first input of the phase detector and a signal at the second input of the phase detector
Data Source
AI summary
An integrated circuit (IC) with a TSV test circuit, a TSV test method are provided, pertaining to IC technologies. The IC may include a first TSV, a second TSV and a phase detector. A first end of the first TSV may be coupled to a predetermined signal output, and a second end of the first TSV may be coupled to a first end of the second TSV. A second end of the second TSV may be coupled to a first input of the phase detector, and a second input of the phase detector may be coupled to the predetermined signal output. The phase detector may be configured to determine a phase difference between signals at the first and the second inputs. In this IC, a defective TSV can be identified and segregated with a redundant TSV. This IC facilitates efficient fault correction and signal routing in the IC.