TSV Testing and Repairing Apparatus for 3D IC Stacking

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Solution Overview

Problem

In 3D IC stacking, through silicon via (TSV) structures are prone to open circuits or short circuits due to insulation film damage or position offsets during fabrication and stacking, leading to signal transmission failures and increased power consumption.

Innovation Solution

A testing and repairing apparatus is integrated into stacked-chip structures, utilizing switches, resistors, and control circuits to self-detect TSV conditions and automatically switch to redundant TSVs to maintain signal transmission, preventing failures and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If TSV structure is used for signal transmission between stacked chips, then connection length is shortened and chip performance is improved, but the TSV is prone to open circuits or short circuits due to insulation film damage or position offsets

Engineering Contradiction:
Improveconnection lengthVSAvoidTSV connection reliability
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

The patent applies preliminary action by integrating testing and repairing apparatus into the chip structure before actual use. The testing circuit proactively detects TSV defects (open circuits, short circuits) during chip operation, and the repairing apparatus preemptively corrects these defects before they cause system failure. This resolves the contradiction by maintaining high reliability despite the inherent vulnerability of TSV structures to fabrication defects.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements self-service through autonomous testing and repairing mechanisms embedded within the chip. The testing apparatus automatically detects TSV conditions without external intervention, and the repairing apparatus autonomously switches to redundant TSVs or corrects defects. This self-service capability ensures continuous reliable operation of the stacked chip system despite TSV vulnerabilities, resolving the reliability concern while maintaining the short connection length advantage.

Inventive Principle:
Principle #25Self-service

2Area of stationary object

If multiple ICs are vertically stacked to reduce structure size, then area is reduced, but fabrication defects cause TSV open circuits or short circuits leading to signal transmission failures

Engineering Contradiction:
Improvechip areaVSAvoidsignal transmission reliability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent applies parameter changes by modifying the electrical characteristics of the TSV connection through integrated testing and repairing circuits. The system dynamically adjusts detection parameters (voltage levels, current measurements) to identify TSV defects, and modifies the operational state by switching between healthy and defective TSVs. This resolves the contradiction by ensuring reliable signal transmission through parameter monitoring and adjustment, despite the compact stacked architecture increasing TSV defect probability.

Inventive Principle:
Principle #35Parameter changes

3Speed

If TSV fabrication process is used, then connection speed is improved, but insulation film damage or position offsets cause TSV failures

Engineering Contradiction:
Improvesignal transmission speedVSAvoidTSV functional reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent implements feedback mechanisms where the testing apparatus continuously monitors TSV electrical characteristics and provides feedback to the controlling circuit. When TSV defects are detected through voltage or current measurements, the system receives feedback about the defective state and automatically switches to redundant TSVs or activates repairing mechanisms. This feedback loop ensures that signal transmission reliability is maintained at high speeds by quickly detecting and correcting TSV failures that occur during high-speed operation.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9086455B2Testing and repairing apparatus of through silicon via in stacked-chip
Publication Date: 2015.07.21 IND TECH RES INST
  • US9086455B2 patent drawing
  • US9086455B2 patent drawing
  • US9086455B2 patent drawing

AI summary

A testing and repairing apparatus of through silicon via (TSV) disposed between a first and a second chips is provided. First terminals of a first and a second switches are coupled to a first terminal of the TSV. First terminals of a third and a fourth switches are coupled to a second terminal of the TSV. A first terminal of a first resister is coupled to a first voltage. A first selector is coupled between second terminals of the second switch and the first resister. A second selector is coupled between a second terminal of the fourth switch and a second voltage. A first control circuit detects the second terminal of the second switch, and controls the first switch, the second switch and the first selector. A second control circuit controls the third switch, the fourth switch and the second selector.