TSV Validation Structure Using Smaller Openings for SiC Etch Control
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Solution Overview
Problem
The formation of through substrate vias (TSVs) in integrated circuits, particularly in gallium nitride (GaN) devices on silicon carbide (SiC) substrates, is challenging due to the difficulty in etching SiC, which can result in over-etching or under-etching, leading to inconsistent electrical connections and validation issues.
Innovation Solution
A method is developed to validate the formation of standard TSVs by using non-standard TSVs with smaller openings, where the etch rate is slower, allowing for empirical determination of the etching time to ensure proper formation of both standard and non-standard TSVs, and a conductive material is used to form electrical paths within the TSVs, with a test process to verify conductivity and resistance thresholds for validation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If SiC substrate etching is performed to form TSVs, then electrical connections are established, but over-etching or under-etching occurs leading to inconsistent formation
Solution Approach 1:
A non-standard TSV validation structure is formed prior to the main TSV formation process. This validation structure includes a smaller opening that etches slower than standard TSV openings. By successfully etching through this validation structure, the process parameters are confirmed to be correct, ensuring subsequent standard TSVs will be properly formed. This preliminary validation action prevents both over-etching and under-etching of the production TSVs.
Solution Approach 2:
The validation structure is a simplified copy of the actual TSV structure, containing essential features (opening, etching process, conductive material deposition) but with a smaller opening size. This copy allows process validation without requiring full electrical testing of each production TSV. The validation structure replicates the critical etching behavior to predict successful formation of standard TSVs.
2Measurement precision
If each standard TSV is directly tested for conductivity, then formation validation is achieved, but testing time and complexity increase significantly
Solution Approach 1:
The validation structure serves multiple functions: it validates the etching process parameters, confirms proper conductive material deposition, and predicts the formation quality of all standard TSVs. A single validation structure replaces the need for individual testing of numerous production TSVs, making the validation process universal and efficient while maintaining measurement precision.
3Productivity
If smaller opening size is used for validation TSV, then etch rate is slower allowing empirical determination, but opening size must be precisely controlled
Solution Approach 1:
The validation structure uses a deliberately changed parameter - a smaller opening size compared to standard TSVs. This parameter change results in a slower etch rate that is easier to control and measure empirically. The smaller opening provides a more sensitive indicator of etching process accuracy, allowing precise determination of optimal etching parameters before production runs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures reliable electrical connections by validating the formation of standard TSVs based on the formation of non-standard TSVs, providing confidence in the proper formation of TSVs without direct testing of each standard TSV, thus improving the consistency and efficiency of the etching process.
Implementation Method 1
The substrate is etched by an etching material from the first surface to a second surface
Implementation Method 2
a conductive material is arranged within the first opening to form a conductive path between the first surface to the second surface
Data Source
AI summary
An integrated circuit comprises a substrate that includes a first surface and a second surface. A first through substrate via (TSV) is formed between the first surface and the second surface and a first conductive material is arranged within the first TSV to form a conductive path between the first surface and the second surface through the substrate. A second TSV is formed between the first surface and the second surface and a second conductive material arranged within the second TSV to form a conductive path between the first surface and the second surface through the substrate. In examples the first TSV has a larger cross-sectional area than the second TSV, the cross-section of the first TSV and second TSV being in a plane parallel to the first surface or the second surface.