Tungsten Plug Fabrication via Tapered Dielectric Mandrel
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Solution Overview
Problem
The existing methods for forming contact tungsten plugs in semiconductor devices often result in the enhancement of natural tungsten seams due to the etch back process, leading to undesirable vertical profiles.
Innovation Solution
A method involving the formation of inter-layer dielectric with multiple layers of dielectric material having increasing wet etch rates, followed by a dry etch to create vertical holes and a subsequent wet etch to form tapered side walls, allowing for seamless tungsten plug formation through Ti/TiN deposition and CMP or dry etch back.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a dry etch or CMP process is used for etch back to remove wafer surface tungsten, then the tungsten seam is enhanced or enlarged, but the desired seamless plug structure is achieved
Solution Approach 1:
The patent applies preliminary action by forming a mandrel structure with tapered side walls before tungsten deposition. The mandrel is created through a sequence of steps: depositing a first dielectric layer, forming a patterned layer with openings, depositing a second dielectric layer with tapered sidewalls, and removing the patterned layer. This pre-formed tapered mandrel guides the subsequent tungsten deposition to create plugs with tapered side walls, preventing seam formation during the etch back process. The preliminary structure preparation ensures that when tungsten is deposited and subsequently etched back, the tapered geometry prevents seam enhancement that would otherwise occur with vertical wall plugs.
2Device complexity
If a vertical CT profile is created through conventional etch back, then the contact structure is simplified, but tungsten seams form and are enhanced
Solution Approach 1:
The patent applies the curvature principle by transitioning from vertical (straight) side walls to tapered (angled) side walls in the contact plug structure. The mandrel formation process creates a tapered geometry with angled side walls rather than vertical walls. This curved/tapered profile is then transferred to the tungsten plug during deposition and etch back processes. The tapered shape distributes stress and prevents the concentration of defects at the top surface, thereby eliminating seam formation and enhancement that occurs with vertical profiles.
3Object-generated harmful factors
If multiple layers of dielectric material with increasing wet etch rates are used, then tapered side walls are formed to reduce seam enhancement, but the inter-layer dielectric structure becomes more complex
Solution Approach 1:
The patent applies local quality by assigning different etch rate characteristics to different layers of the inter-layer dielectric structure. The first dielectric layer has a slower wet etch rate, while the second dielectric layer has a faster wet etch rate. This localized variation in etch rates across different layers enables selective removal and formation of tapered side walls in specific regions. The patterned layer with openings is deposited only in contact regions, creating local variations in structure that guide the etch process to form tapered profiles only where needed, rather than uniformly across the entire wafer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the enhancement of tungsten seams, enabling the creation of seamless tungsten plugs with tapered side walls, enhancing the vertical connection between silicon and metal lines in semiconductor devices.
Implementation Method 1
performing a wet etch step to change the configuration of the hole or trench to one that has substantially sloped or tapered side walls
Implementation Method 2
The hole or trench may initially be etched using a dry etch process to form a hole or trench with substantially vertical walls
Implementation Method 3
In a CMP step a polishing pad rotates against the wafer surface while a slurry removes the metal overlying the wafer surface
Data Source
AI summary
In a semiconductor process, a seamless tungsten plug is formed in an inter-layer dielectric by forming the inter-layer dielectric from multiple oxide layers having different wet etch rates, from lowest wet-etch rate for the lowest layer to highest wet-etch rate for the highest layer, forming a hole or trench in the inter-layer dielectric using a dry etch process, reconfiguring the hole or trench to have sloped side walls by performing a wet etch step, and filling the hole or trench with tungsten and etching back the tungsten to form a seamless tungsten plug.