Turbo Decoder Sliding-Window MAP Decoding With Shared Memory

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Solution Overview

Problem

Conventional turbo decoders using the MAP algorithm require additional memories for backward metric calculations, leading to inefficiencies in memory design and delays due to continuous data updates during trellis transitions.

Innovation Solution

A turbo decoder method that performs iterative decoding using a single input memory, with forward and backward metric calculations shared through a multi-sliding window scheme, where the alpha metric block calculates data in four windows, and beta metric blocks perform backward calculations in alternating window sizes, reducing memory requirements and optimizing data processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional memories are used for backward metric calculations in conventional turbo decoders, then decoding accuracy is improved, but hardware complexity and power consumption increase

Engineering Contradiction:
Improvedecoding accuracyVSAvoidmemory requirements
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the forward and backward metric calculation functions into a single shared memory structure. The same memory unit is used for both forward alpha metric calculations and backward beta metric calculations, eliminating the need for separate memory blocks. This is achieved through time-multiplexed access where the memory alternates between storing forward metrics and backward metrics during different phases of the iterative decoding process.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The memory structure is designed to serve multiple functions: it stores both forward alpha metrics and backward beta metrics, and can be accessed in different modes (forward direction and backward direction) depending on the calculation phase. This multi-functional memory replaces what would traditionally require separate dedicated memory blocks for each function, reducing overall hardware complexity while maintaining decoding accuracy.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If continuous data updates are performed during trellis transitions, then real-time decoding is achieved, but processing delays increase

Engineering Contradiction:
Improvereal-time decoding capabilityVSAvoidprocessing delay
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements periodic action through its multi-sliding window scheme where metric calculations are performed in discrete windowed phases rather than continuous updates. The forward and backward metric calculations are executed in alternating periodic phases, with each phase completing its calculations before transitioning to the next phase. This periodic approach reduces the frequency of memory access operations and allows for more efficient batch processing, thereby reducing overall processing delays while maintaining real-time decoding capability.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent performs preliminary calculations within each sliding window before transitioning to the next window. By completing all necessary forward and backward metric calculations for a given window before moving to the next data segment, the system minimizes the frequency of context switches and memory reconfiguration operations. This preliminary action approach reduces processing overhead and delays associated with continuous incremental updates.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If separate memory blocks are used for forward and backward calculations, then calculation accuracy is maintained, but hardware resources increase

Engineering Contradiction:
Improvecalculation accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent combines separate memory blocks for forward and backward calculations into a single shared memory unit. The same physical memory structure is used to store both alpha metrics (forward calculations) and beta metrics (backward calculations), eliminating redundant memory hardware. This merging reduces the total number of memory cells, read/write circuits, and control logic required, thereby significantly reducing power consumption while preserving calculation accuracy through proper data management.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent implements a strategy where memory space is dynamically allocated and recovered between forward and backward calculation phases. During forward metric calculation, the memory stores alpha values; during backward metric calculation, the same memory space is reused to store beta values. This dynamic allocation and recovery of memory resources eliminates the need for permanent duplicate storage structures, reducing hardware resources and associated power consumption while maintaining the precision required for accurate metric calculations.

Inventive Principle:
Principle #34Discarding and recovering

Data Source

PatentUS7584407B2Decoder and method for performing decoding operation using map algorithm in mobile communication system
Publication Date: 2009.09.01 SAMSUNG ELECTRONICS CO LTD
  • US7584407B2 patent drawing
  • US7584407B2 patent drawing
  • US7584407B2 patent drawing

AI summary

A turbo decoder and a decoding method are disclosed, which use a Maximum A Posteriori (MAP) algorithm in order to perform iterative decoding. The method has the steps of sequentially receiving input data in a memory having a predetermined window size and performing a forward metric calculation for the input data so that the input data has a four window size, performing a first backward metric calculation for the input data and outputting first valid data when the data are input to the memory by twice the window size, and performing a second backward metric calculation for the input data and outputting second valid data when the data are input to the memory by three times the window size.