TVS Diode Epitaxial Segmentation for Low Capacitance

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Solution Overview

Problem

Current transient-voltage-suppression (TVS) diode devices face challenges in reducing capacitance while maintaining a simplified and low-cost manufacturing process, and shrinking the area occupied by the TVS chips.

Innovation Solution

The TVS diode device is constructed using two thin epitaxial layers formed by epitaxial growth processes, with trench isolation features and specific doping processes to create a Zener diode with stable reverse breakdown voltage, low leakage current, and low capacitance, allowing for efficient transient voltage suppression.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional TVS diode device configurations are used, then the manufacturing process is simplified and cost is reduced, but capacitance cannot be sufficiently reduced

Engineering Contradiction:
ImprovecapacitanceVSAvoiddevice configuration complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The device divides the active region into multiple discrete doped well regions (first conductivity type and second conductivity type) separated by trench isolation features. This segmentation allows each region to contribute differently to the overall capacitance while maintaining the voltage suppression function, thereby reducing total capacitance without overly complicating the manufacturing process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the device are doped with different conductivity types and concentrations to create localized electrical properties. The first conductivity type doped well regions and second conductivity type doped well regions have distinct doping characteristics that optimize the breakdown voltage and capacitance distribution across the device structure.

Inventive Principle:
Principle #3Local quality

2Area of moving object

If the TVS chip area is reduced, then integration density improves, but manufacturing precision and control become more difficult

Engineering Contradiction:
ImproveTVS chip areaVSAvoidfabrication precision
Core Design Contradiction:
Area of moving objectVSManufacturing precision

Solution Approach 1:

The device utilizes vertical layering with multiple epitaxial layers grown at different depths, rather than expanding horizontally. The trench isolation features extend vertically into the substrate, and doped well regions are positioned at different vertical levels, allowing compact horizontal footprint while maintaining sufficient manufacturing control through precise vertical epitaxial growth and doping processes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

Multiple functional regions are nested within the compact chip structure, with doped well regions positioned within epitaxial layers that are themselves contained within the substrate. The trench isolation features nest between active regions, allowing maximum utilization of the chip area while maintaining manufacturability through systematic layering.

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution achieves a stable reverse breakdown voltage, low leakage current, and low capacitance, effectively protecting high-frequency circuits from electrostatic discharge and transient voltage overstress, while simplifying the fabrication process and reducing costs.

Implementation Method 1

A second conductivity type first epitaxial layer is disposed over the substrate... A second conductivity type second epitaxial layer is disposed between the second conductivity type first epitaxial layer and the substrate

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 2

A first conductivity type doped well region is disposed in the second conductivity type second epitaxial layer... A first conductivity type buried layer is disposed in the second conductivity type second epitaxial layer

Methodology Applied
Scientific EffectDoping: Dopants

Implementation Method 3

The second conductivity type doped well region and the first conductivity type buried layer collectively form a Zener diode... the operating circuit's voltage is clamped to a predetermined maximum clamping voltage

Methodology Applied
Scientific EffectZener breakdown:

Data Source

PatentUS10381341B2Transient-voltage-suppression (TVS) diode device and method of fabricating the same
Publication Date: 2019.08.13 NUVOTON
  • US10381341B2 patent drawing
  • US10381341B2 patent drawing
  • US10381341B2 patent drawing

AI summary

A transient-voltage-suppression (TVS) diode device and a method of fabricating the same are disclosed. The TVS diode device includes a substrate. A second conductivity type first epitaxial layer is disposed over the substrate. A second conductivity type second epitaxial layer is disposed between the second conductivity type first epitaxial layer and the substrate. A plurality of trench isolation features divides the substrate into a first active region including a second conductivity type doped well region disposed in the second conductivity type first epitaxial layer. A first conductivity type doped well region and a first conductivity type buried layer are disposed in the second conductivity type second epitaxial layer. The second conductivity type doped well region and the first conductivity type buried layer collectively form a Zener diode.