Transient Voltage Suppressor Diode with Localized Intrinsic Layer Thinning

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Solution Overview

Problem

Transient voltage suppressor diodes and other electrical devices face challenges in reducing turn on time, leading to overshoot voltages due to their small capacity and increased switching time between blocking and conducting states.

Innovation Solution

The electrical device features a layer arrangement with an intrinsic layer of reduced thickness, where the area of the reduced thickness portion is less than 50% of the active area, and includes indenters of the second conductivity type extending into the intrinsic layer to further reduce the turn on time, while maintaining a small capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If the intrinsic layer thickness is reduced, then the turn on time is reduced, but the capacitance changes significantly

Engineering Contradiction:
Improveturn on timeVSAvoidcapacitance
Core Design Contradiction:
Loss of timeVSQuantity of substance

Solution Approach 1:

The patent applies local quality by creating a non-uniform intrinsic layer where only a central portion has reduced thickness while peripheral areas maintain original thickness. This is achieved through selective removal processes that target specific regions, allowing the device to have fast turn-on characteristics in the central area while preserving capacitance through the thicker peripheral regions.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The intrinsic layer is segmented into different thickness zones - a thinner central region and thicker peripheral regions. This segmentation allows different parts of the device to serve different functions: the thin central region provides fast switching, while the thicker peripheral regions maintain capacitance, thus resolving the contradiction between turn-on time and capacitance.

Inventive Principle:
Principle #1Segmentation

2Speed

If the intrinsic layer thickness is uniformly reduced, then the switching speed increases, but the device capacity decreases

Engineering Contradiction:
Improveswitching speedVSAvoiddevice capacity
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

Instead of uniform reduction, the patent implements local quality variation where only the central portion of the intrinsic layer is thinned. This creates regions with different properties: the central thin region enables fast switching speed, while the peripheral thick regions preserve device capacity, thereby resolving the contradiction between switching speed and device capacity.

Inventive Principle:
Principle #3Local quality

3Loss of time

If the turn on time is reduced, then the device responds faster to voltage surges, but overshoot voltages occur due to small capacity

Engineering Contradiction:
Improveturn on timeVSAvoidovershoot voltages
Core Design Contradiction:
Loss of timeVSObject-generated harmful factors

Solution Approach 1:

The patent resolves this contradiction by creating a non-uniform intrinsic layer structure where the central thin region enables fast turn-on response to voltage surges, while the peripheral thick regions maintain sufficient capacitance to prevent overshoot voltages. This local differentiation allows simultaneous achievement of fast response and voltage stabilization.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The device is segmented into functional zones: a central fast-switching region with thin intrinsic layer for rapid response, and peripheral capacitance-maintaining regions with thick intrinsic layer to suppress overshoot voltages. This segmentation enables the device to simultaneously achieve fast turn-on time and prevent harmful overshoot voltages.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration significantly reduces turn on time while minimizing changes to capacitance, preventing overshoot voltages by allowing the device to conduct current before the pulse is fully applied, thus enhancing the device's performance in handling high voltage surges.

Implementation Method 1

The intrinsic layer is arranged between the first and the second layer and has a reduced thickness at at least one portion... significantly reduces turn on time

Methodology Applied
Scientific EffectCharge carrier transit:

Implementation Method 2

the layer arrangement comprises one or more indenters which extend from the upper layer into the intrinsic layer such that the intrinsic layer has a reduced thickness... the indenters comprise polysilicon and have a depth which is at least 10% smaller compared to a thickness of the intrinsic layer

Methodology Applied
Scientific EffectCharge injection:

Implementation Method 3

a transient voltage suppressor diode is used for protecting a circuit from high voltage surges. Such a transient voltage suppressor diode, also referred to as avalanche diode, is designed to go through avalanche breakdown (in the reverse direction) at a specific reverse bias voltage

Methodology Applied
Scientific EffectAvalanche breakdown: Avalanche Breakdown

Data Source

PatentUS9379257B2Electrical device and method for manufacturing same
Publication Date: 2016.06.28 INFINEON TECHNOLOGIES AG
  • US9379257B2 patent drawing
  • US9379257B2 patent drawing
  • US9379257B2 patent drawing

AI summary

An electrical device includes a first layer, a second layer and an intrinsic layer. The first layer is of a first conductivity type, wherein the second layer is of a second conductivity type opposite to the first conductivity type. The intrinsic layer is arranged between the first and the second layer and has a reduced thickness at at least one portion. An area of the at least one portion is less than 50% of an active area in which the first and second layer face each other.