Low-Capacity TVS Package Structure with Solder Wafer

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Solution Overview

Problem

Large area semiconductor dies used in surface mounting c-type (SMC) packages exhibit a significant solder-void ratio, which affects the reliability and performance of transient-voltage-suppression (TVS) devices, particularly in high-power applications where multiple dies are stacked to achieve higher breakdown voltage.

Innovation Solution

A package structure is introduced that includes a lead frame with a die pad, a chip stack comprising a TVS device, a solder wafer, and a glass passivation pallet (GPP) device, where the solder wafer is sandwiched between the TVS and GPP chips, and a grooved pad and improved clip for enhanced thermal dissipation and solder retainment, replacing solder paste to eliminate void areas and improve recovery capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If larger semiconductor dies are used to provide greater current handling capability, then power handling capability is improved, but solder-void ratio increases affecting reliability

Engineering Contradiction:
Improvecurrent handling capabilityVSAvoidsolder-void ratio
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent divides the single large die into multiple smaller TVS dies connected in series within a stacked configuration. Each die is smaller with better solder fill, while the series connection achieves the required high breakdown voltage and current handling capability, thus resolving the contradiction between power handling and solder-void ratio

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a planar single-die configuration to a three-dimensional stacked configuration with multiple dies connected vertically. This dimensional change allows each die to be smaller (improving solder fill) while the stack provides the required power handling capability through series connection

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If solder paste is used for mounting TVS dies, then ease of manufacture is improved, but void areas are created affecting reliability

Engineering Contradiction:
Improvesolder mounting processVSAvoidvoid areas
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the solder mounting approach from using solder paste to using solder balls or solder preforms. This parameter change in the solder form factor eliminates void areas while maintaining ease of manufacture through automated placement processes

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses disposable solder preforms or solder balls that are placed on the die pads before mounting. These consumable solder elements ensure proper fill without voids and are replaced in each manufacturing cycle, maintaining ease of manufacture while eliminating void areas

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentEP3971959A1Package structure for low-capacity tvs
Publication Date: 2022.03.23 LITTELFUSE SEMICON WUXI
  • EP3971959A1 patent drawingFigure 1
  • EP3971959A1 patent drawingFigure 2~3
  • EP3971959A1 patent drawingFigure 4~5

AI summary

Provided herein are package structures for low-capacity transient-voltage-suppression (TVS) devices. In one example, a package structure may include a first lead frame including a die pad, and a chip stack coupled to the first lead frame. The chip stack may include a transient-voltage-suppression (TVS) device coupled to the die pad, a solder wafer coupled to the TVS device, and a glass passivation pallet (GPP) device coupled to the solder wafer.