Twin-Cell OTPM Bit Identification Using ECC Flags and Sense Amplifier Tilt

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Solution Overview

Problem

Identifying unprogrammed bits in one-time-programmable memory (OTPM) is challenging due to the asymmetry between true and complement transistors, which makes it difficult to determine if bits have been already programmed, especially at larger threshold voltage shifts, and existing methods require additional non-volatile random access memory (NVRAM) for address management.

Innovation Solution

The use of an error correction circuit (ECC) with flag bits to identify programmed bits through Unit-Usage-Flags (UFF) and Block-Usage-Flags (BUF), combined with a sense amplifier tilt feature to perform read operations and determine bit stability, allowing for the identification of unprogrammed bits without additional NVRAM and default states.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional NVRAM is used for address management, then bit programming status can be tracked, but device complexity and memory overhead increase

Engineering Contradiction:
Improvebit programming status trackingVSAvoidmemory overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory device performs self-service by using its own internal ECC circuitry and existing memory structures to track programming status. The ECC flag bits serve dual purposes: error correction and usage status indication, eliminating the need for separate NVRAM resources.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The ECC flag bits are designed to serve multiple functions simultaneously: they act as both error correction codes for data integrity and as usage flags to indicate whether memory cells have been programmed. This multi-functionality reduces overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Measurement precision

If sense amplifier tilt is used to identify programmed bits, then detection accuracy improves, but the complexity of read operations increases

Engineering Contradiction:
Improveprogrammed bit detection accuracyVSAvoidread operation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The sense amplifier tilt mechanism works by changing the reference voltage parameter during read operations. By adjusting the sense amplifier's reference level, the circuit can distinguish between programmed and unprogrammed states more accurately, even in the presence of threshold voltage shifts.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The ECC circuit serves as an intermediary that mediates between the memory cells and the control logic. It performs the complex comparison operations using flag bits, simplifying the overall control architecture while maintaining high detection accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If multiple ECC units are used to reduce detection failure rates, then reliability improves, but device complexity increases

Engineering Contradiction:
Improvedetection failure rateVSAvoidECC circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory array is divided into multiple segments, each with its own ECC unit and associated flag bits. This segmentation allows independent error correction and status tracking for each segment, improving overall reliability while keeping individual ECC units manageable in size.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11694757B2Structures and methods of identifying unprogrammed bits for one-time-programmable-memory (OTPM)
Publication Date: 2023.07.04 GLOBALFOUNDRIES US INC
  • US11694757B2 patent drawing
  • US11694757B2 patent drawing
  • US11694757B2 patent drawing

AI summary

The present disclosure relates to integrated circuits, and more particularly, to a method for identifying unprogrammed bits for one-time-programmable memory (OTPM) and a corresponding structure. In particular, the present disclosure relates to a structure including: a read circuit configured to perform at least one read operation at an address for a twin-cell one-time-programmable-memory (OTPM); and a comparison circuit configured to identify whether at least one bit of the address for the twin-cell OTPM has been programmed based on the at least one read operation.