Two-Bit Memory Device Using Chiral Spin Filter

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Solution Overview

Problem

Current memory technologies face challenges in achieving compact, energy-efficient, and fast-switching non-volatile memory devices, particularly in multi-level cell applications for magnetic memory technologies like MRAM, where existing solutions either have limited lifetime or complex production processes.

Innovation Solution

A two-bit memory device with a layer structure comprising a bottom layer, a molecular layer with a chiral compound acting as a spin filter, and a top ferromagnetic layer, utilizing chiral-induced spin selectivity to achieve four distinct resistance states for encoding two bits of information, with no need for refresh cycles or supply voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Duration of action of stationary object

If flash memory is used for non-volatile storage, then information retention without power is achieved, but writing access becomes slow and device lifetime is limited to one million cycles

Engineering Contradiction:
Improveinformation retentionVSAvoidwriting access speed
Core Design Contradiction:
Duration of action of stationary objectVSProductivity

Solution Approach 1:

The patent changes the physical mechanism from charge storage (flash memory) to magnetic state storage (MRAM), enabling non-volatile storage with fast write access and unlimited endurance by utilizing the magnetic properties of the top layer rather than electrical charge retention

Inventive Principle:
Principle #35Parameter changes

2Productivity

If MRAM is used for non-volatile memory, then fast access and long lifetime are achieved, but production process becomes difficult and complex

Engineering Contradiction:
Improveaccess speedVSAvoidproduction process complexity
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent uses a thin molecular layer with chiral compounds as a spin filter between the bottom and top layers. This molecular layer can be deposited using standard vacuum deposition techniques, simplifying the production process while maintaining the magnetic memory functionality

Inventive Principle:
Principle #30Flexible shells and thin films

Solution Approach 2:

The patent creates a composite structure combining bottom layer, molecular layer with chiral compound, and top layer. This composite approach integrates the spin filtering function at the molecular level with the magnetic storage function, enabling simplified manufacturing through co-deposition or sequential deposition of layers

Inventive Principle:
Principle #40Composite materials

3Quantity of substance

If multi-level cell technology is used in flash memory, then storage density is increased, but device lifetime remains limited and writing speed stays slow

Engineering Contradiction:
Improvestorage capacityVSAvoiddevice lifetime
Core Design Contradiction:
Quantity of substanceVSDuration of action of stationary object

Solution Approach 1:

The patent adds a magnetic dimension to the storage mechanism by utilizing the magnetization state of the top layer in combination with the spin filter state of the molecular layer. This creates four distinct resistance states (00, 01, 10, 11) representing two bits of information, achieving multi-level storage without the lifetime limitations of flash memory

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed memory device provides non-volatile, fast-switching, and compact storage with high spin polarization, enabling efficient data retention and reliable operation without the need for frequent refresh cycles or high energy consumption.

Implementation Method 1

The chiral compound of the molecular layer (C) acts as a spin filter for electrons passing through the molecular layer (C). The chiral compound is of flexible conformation and has a conformation-flexible molecular dipole moment.

Methodology Applied
Scientific EffectChiral-induced spin selectivity (CISS) effect:

Implementation Method 2

The top layer (E) is electrically conductive and ferromagnetic.

Methodology Applied
Scientific EffectFerromagnetism: Ferromagnetism

Implementation Method 3

An electrical resistance of the layer structure for an electrical current running from the bottom layer (A) to the top layer (E) has at least four distinct states which depend on the magnetization of the top layer (E) and on the orientation of the conformation-flexible dipole moment of the chiral compound of the molecular layer (C).

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Data Source

PatentEP4062465B1Two bit memory device and method for operating the two-bit memory device and electronic component
Publication Date: 2024.10.09 MERCK PATENT GMBH
  • EP4062465B1 patent drawingFigure 1a~1d
  • EP4062465B1 patent drawingFigure 2
  • EP4062465B1 patent drawingFigure 3

AI summary

A two-bit memory device (1) having a layer structure (10) is proposed. The layer structure (10) comprises in this order a bottom layer (A), a molecular layer (C) comprising a chiral compound having at least one polar functional group, and a top layer (E). The top layer (E) is electrically conductive and ferromagnetic. The chiral compound of the molecular layer (C) acts as a spin filter for electrons passing through the molecular layer (C). The chiral compound is of flexible conformation and has a conformation-flexible molecular dipole moment. An electrical resistance of the layer structure (10) for an electrical current running from the bottom layer (A) to the top layer (E) has at least four distinct states which depend on the magnetization of the top layer (E) and on the orientation of the conformation-flexible dipole moment of the chiral compound of the molecular layer (C). Further aspects of the invention relate to a method for operating the two-bit memory device and an electronic component comprising at least one two- bit memory device.