Two-Chip Shared Memory Access with Voltage Arbitration
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Solution Overview
Problem
The challenge of reducing hardware cost and power consumption in electronic devices with multiple system-on-chips is exacerbated by each chip using its own memory, leading to inefficiencies and increased resource utilization.
Innovation Solution
Implementing a master-slave identification and access detection pin system on chips to allow them to share a memory by assigning different access priorities, ensuring conflict-free access through voltage management and state switching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If each system-on-chip uses its own memory to store and execute programs, then each chip can operate independently and reliably, but hardware cost and power consumption greatly increase
Solution Approach 1:
Multiple system-on-chip share a single memory resource instead of each chip having its own dedicated memory. The memory is shared among chips through a master-slave arbitration mechanism where one chip is designated as master and others as slaves, allowing them to access the same memory space and reducing total memory capacity required.
Solution Approach 2:
A single memory unit serves multiple system-on-chip simultaneously, performing the function of storing and executing programs for different chips. The memory interface is designed to handle requests from multiple chips through voltage-based arbitration, making the memory universal rather than dedicated to a single chip.
2Ease of operation
If each system-on-chip uses its own memory, then memory access is simple and direct, but hardware cost increases
Solution Approach 1:
Multiple system-on-chip share a single memory resource instead of each chip having its own dedicated memory. The memory is shared among chips through a master-slave arbitration mechanism where one chip is designated as master and others as slaves, allowing them to access the same memory space and reducing total memory capacity required.
3Productivity
If multiple chips access the same memory simultaneously, then resource utilization improves, but access conflicts occur
Solution Approach 1:
Before allowing memory access, the system performs preliminary voltage detection on recognition pins to determine which chip should have access. The master chip maintains a high voltage level on its recognition pin, while slave chips detect this high level and remain in idle state, preventing them from initiating memory access and thus avoiding conflicts before they can occur.
Solution Approach 2:
The system uses voltage detection on master-slave recognition pins to provide feedback about memory access status. When the master chip accesses memory, it maintains a high voltage level that slave chips detect, providing feedback that prevents slave chips from attempting access. This feedback mechanism ensures only one chip accesses memory at a time.
Data Source
AI summary
The electronic device includes a first chip and a second chip. The first chip includes a first master slave recognition pin coupled to a master voltage, a first access detection pin coupled to a first voltage, and a first interface pin coupled to a memory. The second chip includes a second master slave recognition pin, a second access detection pin coupled to the first access detection pin, and a second interface pin coupled to the first interface pin and the memory. When the first chip is activated, the first chip enters an idle state. When the first chip stays in the idle state for more than a predetermined idle time and the first access detection pin remains at the first voltage, the first chip enters an access state.