Two Transistor Ternary RAM Circuit Eliminates Capacitors
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Solution Overview
Problem
Current RAM technologies, such as DDR RAM, face limitations due to slow memory speed caused by capacitors, large size, and low density, leading to a growing disparity between CPU and memory speeds, which results in memory latency becoming a significant bottleneck in computer performance.
Innovation Solution
A two-transistor ternary random access memory (TTTRAM) circuit that eliminates capacitors by using a feedback loop between two transistors, allowing for higher switching frequencies and reduced power consumption, enabling higher density and speed without the need for capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If capacitors are used in RAM circuits to store bits, then memory storage function is achieved, but memory speed is reduced due to slow electric charge
Solution Approach 1:
The patent removes capacitors from the RAM circuit architecture entirely. Instead of using capacitors for bit storage, the invention uses a feedback loop configuration with two transistors and resistors to achieve storage functionality, thereby eliminating the speed limitation imposed by capacitor charging/discharging processes.
Solution Approach 2:
The patent replaces the electrical storage mechanism (capacitors) with a transistor-based feedback system. The feedback loop between two transistors creates a stable state that stores information without requiring capacitive charge storage, thus achieving both storage and high-speed operation.
2Quantity of substance
If DDR RAM uses capacitors for storage, then memory capacity is provided, but device size increases and density decreases
Solution Approach 1:
The patent combines multiple functions into a single compact circuit. The feedback loop configuration integrates storage, switching, and state maintenance functions within a small transistor-based structure, eliminating the need for separate capacitor components and reducing overall device area.
Solution Approach 2:
The patent changes the fundamental storage parameter from capacitive charge (which requires physical space) to transistor state (which can be implemented with minimal components). This parameter transformation enables high-density storage without increasing device area.
3Adaptability or versatility
If traditional RAM architecture is used, then compatibility is maintained, but productivity is limited by memory wall bottleneck
Solution Approach 1:
The patent employs dynamic feedback mechanisms that enable rapid state transitions and switching. The feedback loop continuously monitors and adjusts transistor states, allowing for high-speed operation while maintaining compatibility with existing memory interfaces through appropriate protocol implementation.
Data Source
AI summary
A two transistor ternary random access memory (TTTRAM) circuit includes an voltage/current input, an input/output switch, a first transistor, a first pull up resistor, a second transistor, and a second pull up resistor. The first transistor has a first emitter, a first collector connected to the input/output switch, and a first base. The first pull up resistor is connected to the first emitter and the voltage/current input. The second transistor has a second emitter connected to ground, a second collector, and a second base connected to the input/output switch. The second pull up resistor is connected to the first base, the second collector, and the voltage/current input.