Two-FeFET Unit Cell for Neuromorphic Weight Synapse Linearity

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Solution Overview

Problem

Existing ferroelectric field effect transistors (FeFETs) face challenges in achieving necessary linearity during voltage pulses for neuromorphic computing, particularly in online training processes, where consistent amplitude and duration of pulses are required but difficult to obtain.

Innovation Solution

The implementation of a two-FeFET unit-cell structure, where one FeFET acts as a pass transistor and the other as a non-volatile memory for analog computing, with the gate voltage of the FeFET synapse adjusted to improve linearity by modulating the voltage applied to the synapse, using materials like silicon, germanium, or III-V compound semiconductors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single FeFET is used as both pass transistor and memory device, then device complexity is reduced, but linearity during voltage pulses deteriorates

Engineering Contradiction:
Improvedevice complexityVSAvoidlinearity
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent divides the FeFET functionality into two separate devices: one dedicated to passing signals and another dedicated to storing weight information. This segmentation allows each device to be optimized for its specific function, with the memory FeFET achieving better linearity in weight updates while the pass FeFET handles signal transmission efficiently.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If voltage pulses are applied to the FeFET synapse for weight updates, then computing functionality is enabled, but consistent amplitude and duration of pulses becomes difficult to obtain

Engineering Contradiction:
Improvecomputing functionalityVSAvoidpulse consistency
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent introduces an intermediary circuit structure that includes a pass transistor and a memory device working together. This intermediary structure mediates the voltage pulse application process, enabling consistent weight updates by separating the signal passing function from the memory storage function, thereby achieving more reliable and consistent pulse characteristics.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If design-time optimizations are employed to achieve analog computing characteristics, then non-volatile operation is achieved, but adaptability for online training processes deteriorates

Engineering Contradiction:
Improvenon-volatile operationVSAvoidadaptability for online training
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent creates a dynamic structure where the pass transistor can be turned on or off based on operational requirements. This dynamic control enables the system to adapt between different modes of operation - maintaining non-volatile storage characteristics when needed while enabling flexible, adaptive weight updates during online training processes through controlled signal passage.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances linearity in weight updates, improving the performance of neuromorphic computing by ensuring consistent pulse amplitude and duration, thereby increasing the efficiency of synapse linearity and stability in neuromorphic systems.

Implementation Method 1

The polarization of FE couples with that of the underlying FET leading to unique characteristics such as non-volatile transistor operation (due to P retention in the absence of external E)

Methodology Applied
Scientific EffectFerroelectric polarization: Polarisation

Data Source

PatentUS12026605B2FeFET unit cells for neuromorphic computing
Publication Date: 2024.07.02 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US12026605B2 patent drawing
  • US12026605B2 patent drawing
  • US12026605B2 patent drawing

AI summary

A circuit structure includes a first ferroelectric field effect transistor (FeFET) having a first gate electrode, a first source electrode, and a first drain electrode and a second FeFET having a second gate electrode, a second source electrode, and a second drain electrode. The first gate electrode is connected to a wordline, and the first source electrode and the second source electrode are connected to a bitline. The first drain electrode is connected to the second gate electrode and the second drain electrode is connected to a bias line. A weight synapse structure is constructed by combining two circuit structures. A plurality of weight synapse structures are incorporated into a crossbar array.