Multi-Channel TX Reset Synchronization for Low Lane-to-Lane Skew
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Solution Overview
Problem
As data frequency rates increase, achieving desired levels of inter-channel alignment in multi-channel transmitters becomes more difficult due to lane-to-lane skew, which is challenging for receiver de-skew processing in parallel signal transmission.
Innovation Solution
The integration circuit employs synchronization circuitry with multiple clock signals and sync cells to synchronize reset signals across different TX channel circuitry, utilizing low-speed and high-speed clocks, as well as neighboring-quad clocks, to reduce inter-channel skew between TX signals transmitted by pairs of quads in the integrated circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data frequency rates are increased to improve transmission speed, then transmission speed is improved, but inter-channel alignment becomes more difficult to achieve
Solution Approach 1:
The patent applies preliminary action by synchronizing reset signals across multiple TX channels before data transmission begins. The sync circuitry generates synchronized reset signals that are distributed to all TX channel circuitry in advance, ensuring that all channels start their operation at the same time. This preliminary synchronization prevents inter-channel skew from accumulating as data frequency increases, thereby maintaining inter-channel alignment even at high transmission speeds.
2Productivity
If multiple TX channels are transmitted in parallel to improve productivity, then productivity is improved, but lane-to-lane skew increases
Solution Approach 1:
The patent applies segmentation by dividing the synchronization function into separate sync circuitry units for different quad pairs. Each quad pair has its own sync circuitry that independently generates and distributes synchronized reset signals to its TX channels. This segmented approach allows each segment to be precisely synchronized locally while maintaining overall system productivity through parallel operation of multiple segments.
Solution Approach 2:
The patent uses synchronized reset signals as an intermediary mechanism to coordinate multiple TX channels. The sync circuitry generates these reset signals that act as a mediator, ensuring all TX channels within a quad pair are synchronized before and during data transmission. This intermediary synchronization mechanism enables parallel transmission while maintaining lane-to-lane alignment within the specified skew tolerance.
3Manufacturing precision
If receiver de-skew processing is used to correct misalignment, then alignment is improved, but processing complexity increases
Solution Approach 1:
The patent applies preliminary action by performing synchronization at the transmitter side before signals are sent to the receiver. The sync circuitry ensures that all TX channels are synchronized and aligned before transmission, which significantly reduces the amount of de-skew processing required at the receiver. This shifts the complexity from the receiver to the transmitter, simplifying receiver processing while maintaining alignment.
Data Source
AI summary
In one embodiment, an integrated circuit has one or more multi-channel transmitters, each transmitter having synchronization circuitry that synchronizes different copies of a reset signal used to reset different sets of TX channel circuitry used to generate the multiple TX signals, to reduce the skew between the different TX signals. Each set of synchronization circuitry has (at least) two synchronization stages that re-time different copies of the reset signal to a selected clock signal. In one implementation, the integrated circuit has (at least) two quads, each of which can generate four different TX signals, where both quads can be configured to use the same clock signal to re-time different copies of the reset signal such that the eight different TX signals are all synchronized to one another.