Strip-Shaped UBM Patterns for InFO IPD ESR Reduction
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Solution Overview
Problem
Current integrated fan-out (InFO) package technologies face challenges in achieving high performance and reliability due to limitations in under-bump metallization (UBM) structures and redistribution layer designs, particularly in integrating passive devices, which affect the electrical connectivity and packaging density.
Innovation Solution
The design incorporates strip-shaped and comb-shaped conductive patterns in the UBM structure that are parallel or perpendicular to the top metallization layer of the integrated passive device (IPD), allowing for high coverage ratios and dense vias, thereby reducing equivalent series resistance (ESR) and equivalent series inductance (ESL), and addressing solder bridging and pre-fill void issues through modified conductive patterns.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional UBM structures are used in InFO packages, then manufacturing is simpler, but electrical performance (ESR and ESL) deteriorates and reliability decreases
Solution Approach 1:
The UBM structure is segmented into multiple distinct conductive patterns (strip-shaped and comb-shaped) with different orientations. These segmented patterns are arranged in specific configurations to independently optimize electrical performance characteristics, reducing both ESR and ESL through distributed current paths while maintaining manufacturability through standardized pattern libraries.
Solution Approach 2:
Different regions of the UBM structure are assigned different pattern types (strip-shaped vs. comb-shaped) and orientations based on local electrical performance requirements. The pattern selection and orientation are optimized for specific locations to achieve uniform current distribution and minimize localized hotspots, thereby improving overall reliability without requiring complete structural redesign.
2Quantity of substance
If higher integration density is achieved through smaller feature sizes, then more components fit in given area, but manufacturing precision requirements increase and yield decreases
Solution Approach 1:
The design transitions from conventional geometric patterns to optimized strip-shaped and comb-shaped patterns with specific dimensional parameters. By carefully controlling the width, length, spacing, and orientation of these patterns, the design achieves higher integration density while maintaining manufacturing feasibility through parameter optimization rather than simply reducing all feature sizes proportionally.
3Reliability
If conductive patterns are optimized to reduce ESR and ESL, then electrical performance improves, but manufacturing complexity and potential for defects increase
Solution Approach 1:
The conductive patterns are designed with pre-optimized geometries (strip-shaped and comb-shaped) that inherently guide current flow to minimize ESR and ESL. The patterns are configured in advance during design stage to achieve optimal electrical performance, eliminating the need for complex post-fabrication adjustments or repairs, thereby improving both electrical performance and manufacturing ease.
Data Source
AI summary
A semiconductor package includes an integrated passive device (IPD) including one or more passive devices over a first substrate; and metallization layers over and electrically coupled to the one or more passive devices, where a topmost metallization layer of the metallization layers includes a first plurality of conductive patterns; and a second plurality of conductive patterns interleaved with the first plurality of conductive patterns. The IPD also includes a first under bump metallization (UBM) structure over the topmost metallization layer, where the first UBM structure includes a first plurality of conductive strips, each of the first plurality of conductive strips electrically coupled to a respective one of the first plurality of conductive patterns; and a second plurality of conductive strips interleaved with the first plurality of conductive strips, each of the second plurality of conductive strips electrically coupled to a respective one of the second plurality of conductive patterns.