Unified Memory Address Mapping for CPU and APD Integration
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Solution Overview
Problem
Current computing systems face challenges in efficiently scheduling and managing shared memory access between CPUs and GPUs, limiting their unified operation and leading to constraints in programming environments and power consumption.
Innovation Solution
A method and system that map memory instructions to a shared address space, allowing CPUs and APDs to access and execute instructions in a unified memory model, enabling seamless sharing of physical memory resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If separate memory systems are used for CPU and GPU, then each processor can independently manage its own memory, but efficient access to shared memory and unified operation between CPU and GPU is limited
Solution Approach 1:
The patent merges separate CPU and GPU memory systems into a unified virtual address space, allowing both processors to access the same logical memory regions. This is achieved through a memory management unit that translates virtual addresses to physical addresses in either CPU or GPU memory, enabling seamless shared memory access while maintaining independent physical memory management.
Solution Approach 2:
The patent introduces a memory management unit as an intermediary between CPU and GPU memory systems. This mediator handles address translation and memory allocation, allowing CPU and GPU to access shared memory resources without direct interference in each other's memory management, thus resolving the contradiction between unified access and independent control.
2Productivity
If unified memory model is implemented, then shared physical memory can be accessed by both CPU and APD, but efficient scheduling and quality of service guarantees between processes become more challenging
Solution Approach 1:
The patent segments the unified memory space into distinct regions with different access permissions and scheduling policies. By dividing the shared memory into CPU-accessible regions, GPU-accessible regions, and shared regions, the system can apply different scheduling algorithms and quality of service guarantees to each segment, enabling efficient multi-process scheduling while maintaining unified memory access.
3Adaptability or versatility
If separate programming environments are used for CPU and GPU, then each processor can be optimized for its specific tasks, but programming flexibility and fluid use of combined resources is constrained
Solution Approach 1:
The patent creates a universal programming model where a single virtual address space can be accessed by both CPU and GPU using standard memory access instructions. This allows programmers to write code that automatically utilizes both processors without needing separate programming environments, achieving programming flexibility while maintaining the ability to optimize specific tasks for each processor type.
Data Source
AI summary
Methods and systems are provided for mapping a memory instruction to a shared memory address space in a computer arrangement having a CPU and an APD. A method includes receiving a memory instruction that refers to an address in the shared memory address space, mapping the memory instruction based on the address to a memory resource associated with either the CPU or the APD, and performing the memory instruction based on the mapping.