Unified OTP Fuse Array for Memory Redundancy and Circuit Tuning
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Solution Overview
Problem
The challenge in integrated circuits is that fuse size reduction has not kept pace with the advancement in transistor feature size, leading to a greater relative portion of the integrated circuit being occupied by fuses, and existing systems require a larger number of one-time programmable (OTP) elements for both memory and non-memory array circuits, necessitating a unified and efficient approach for OTP implementation.
Innovation Solution
A unified OTP element system is introduced, featuring a fuse array circuit with a programmable fuse controller that allows fuses to be shared among memory and non-memory array circuits, utilizing a fuse bank structure and Built-in Self-Test (BIST) ports for programming and testing, enabling flexible usage of fuses for redundancy repair and tuning across various circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If dedicated OTP elements are provided for each circuit (memory array and non-memory array), then each circuit can be independently optimized, but the total number of OTP elements increases
Solution Approach 1:
The patent implements a unified OTP element system where a single OTP element can serve multiple functions across different circuit types. The OTP element can be programmed to provide redundancy repair information for memory arrays or tuning information for non-memory array circuits, eliminating the need for separate dedicated OTP elements for each circuit type while maintaining independent optimization capability.
Solution Approach 2:
The patent merges the OTP element resources previously distributed separately across memory array circuits and non-memory array circuits into a shared pool. By combining these resources, the system reduces the total number of OTP elements required while still allowing each circuit type to receive the specific programming information it needs.
2Area of stationary object
If fuse size is reduced to match transistor feature size advancements, then the relative portion of the integrated circuit occupied by fuses decreases, but fuse size reduction has not kept pace with transistor feature size reduction
Solution Approach 1:
By making OTP elements multi-functional and shareable across different circuit types, the patent increases the utilization efficiency of each fuse. This allows the same physical fuse resources to serve multiple purposes, effectively reducing the relative number of fuses needed in the integrated circuit even though individual fuse sizes have not been reduced.
Solution Approach 2:
The patent changes the utilization parameter of OTP elements from dedicated single-use to shared multi-use. This parameter change allows the system to achieve the effect of reduced fuse quantity without physically reducing fuse size, thereby addressing the area occupation issue.
3Manufacturing precision
If separate OTP element systems are implemented for memory array circuits and non-memory array circuits, then specific programming can be provided to each circuit, but the overall system complexity increases
Solution Approach 1:
The patent creates a universal OTP element system that can be programmed for different circuit types through software or control logic rather than requiring separate physical systems. This maintains the ability to provide specific programming to memory arrays and non-memory arrays while reducing the structural complexity of the overall system.
Solution Approach 2:
The patent segments the programming information into different types (redundancy repair information for memory arrays, tuning information for non-memory arrays) while using a unified OTP element structure. This allows specific programming capabilities to be maintained through information segmentation rather than system segmentation, reducing overall complexity.
Data Source
AI summary
A system with a repairable memory array having redundant memory cells to replace one or more defective memory cells that are detected after fabrication. The system also includes non memory array circuits having circuitry that may adjust one or more operating parameters such as operating current, operating voltage, resistance, capacitance, timing characteristics and an operating mode. A set of one time programmable elements can be used to selectively store information for modifying operating parameters and replacing the defective memory cells with redundant memory cells.