Universal Input Buffer for Single-Ended and Differential Signals
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing semiconductor integrated circuits require multiple pins and traces for differential signaling, which increases complexity and cost, while also needing to handle various input formats and frequencies, particularly in devices like DPLLs, FPGAs, and CPLDs that need to support both single-ended and differential signaling.
Innovation Solution
A universal input buffer design with two pins that can handle both independent single-ended and differential signals, utilizing a multiplexer and dual single- and differential buffers to accommodate LVCMOS, LVPECL, LVDS, and CML inputs, reducing the number of pins required and enabling flexible signal termination.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If differential signaling is used for noise immunity and high frequency applications, then noise immunity and frequency handling are improved, but the number of pins and PCB traces required increases
Solution Approach 1:
The input buffer is designed to perform multiple functions: it can operate as a single-ended buffer for LVCMOS signals or as a differential buffer for LVDS, LVPECL, HCSL, and CML signals. The same physical buffer circuitry and pins are used for both signaling types, eliminating the need for separate dedicated circuits and reducing the total pin count while maintaining noise immunity benefits of differential signaling when needed
2Adaptability or versatility
If separate single-ended and differential input buffers are provided, then support for various input formats is improved, but device complexity and pin count increase
Solution Approach 1:
The input buffer incorporates control logic that dynamically configures the buffer's operation mode based on the detected signal type. The buffer can switch between single-ended and differential modes, and adjust its termination characteristics dynamically, allowing the same hardware to adapt to different input formats (LVCMOS, LVDS, LVPECL, HCSL, CML) without requiring separate dedicated circuits for each format
Solution Approach 2:
A single input buffer circuit is designed to handle multiple signal formats universally. The buffer includes configurable termination resistors and control logic that can be programmed to support various differential and single-ended standards, eliminating the need for multiple separate buffer circuits and reducing device complexity
3Adaptability or versatility
If paired input pins are used to support both two single-ended LVCMOS or one differential input, then versatility is improved, but the number of pins required is still higher than optimal
Solution Approach 1:
The input buffer enables each pin to serve multiple functions: a pin can be used as a single-ended input for LVCMOS signals or as one side of a differential pair for LVDS/LVPECL/HCSL/CML signals. The buffer's internal circuitry and termination can be dynamically configured to support either mode, allowing maximum versatility from a minimal pin count without requiring additional dedicated pins for different signal types
Data Source
AI summary
A universal input buffer has a pair of input pins. A first input of a multiplexer is coupled to the second input pin and a second input of the multiplexer receives a common mode voltage of a differential signal applied to the first pin. The multiplexer is responsive to a selection signal to select either of the first and second inputs of said multiplexer. A pair of single-input buffers have inputs coupled respectively to the first and second input pins. A first input of a first differential buffer is coupled to the first input pin, a first input of a second differential buffer is coupled to the second input pin, the second input of the first differential buffer is coupled to the output of the multiplexer, and the second input of the second differential buffer receives a common mode voltage of a differential signal applied to the second pin.