Universal PCB Assembly for C-PHY and D-PHY Signal Integrity

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Solution Overview

Problem

Existing dual-mode IC chips requiring both C-PHY and D-PHY functions necessitate separate PCB designs for each mode, leading to increased design and manufacturing costs.

Innovation Solution

A universal PCB design with assembly option techniques that supports both C-PHY and D-PHY interfaces by using a single layout, allowing the IC chip to be configured to connect to different wires for either function through assembly options.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate PCB designs are used for C-PHY and D-PHY modes, then signal integrity for each mode is ensured, but design and manufacturing costs increase

Engineering Contradiction:
Improvesignal integrityVSAvoiddesign and manufacturing costs
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent applies universality by designing a single PCB layout that can support both C-PHY and D-PHY interface modes. The PCB includes pin pads and wires configured to accommodate either interface type, allowing one PCB design to serve multiple functions. This eliminates the need for separate PCB designs for each mode, thereby reducing design and manufacturing costs while maintaining proper signal integrity for both C-PHY and D-PHY through appropriate impedance control and signal routing.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Ease of manufacture

If a single universal PCB design is used for both C-PHY and D-PHY, then design and manufacturing costs are reduced, but maintaining signal integrity and impedance matching for both modes becomes more difficult

Engineering Contradiction:
Improvedesign and manufacturing costsVSAvoidsignal integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies local quality by configuring specific regions of the PCB with mode-specific characteristics. The PCB includes pin pads and wires that can be selectively configured for C-PHY or D-PHY modes through assembly options. Different portions of the PCB layout are optimized for their respective interface requirements, with appropriate impedance control and signal routing for each mode, ensuring that signal integrity is maintained locally for whichever mode is selected.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent applies dynamics by making the PCB configuration adaptable through assembly options. The PCB can be dynamically configured at the assembly stage to support either C-PHY or D-PHY mode by selecting appropriate connection configurations. This dynamic adaptability allows the same PCB design to maintain optimal signal integrity for different interface modes without requiring separate rigid designs for each mode.

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If assembly option techniques are used to configure connections, then flexibility to support both modes is achieved, but assembly complexity increases

Engineering Contradiction:
Improveflexibility to support both modesVSAvoidassembly complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the PCB into modular sections with distinct pin pads and wire configurations for C-PHY and D-PHY modes. Each interface mode has its own dedicated connection segments that can be independently configured. This segmentation allows assembly options to selectively activate the appropriate segments for the desired mode, providing flexibility while keeping the assembly process manageable through clear modular boundaries.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP4601420A1A PCB for an IC chip with d-PHY function and c-PHY function and an PCB assembly including the IC chip
Publication Date: 2025.08.13 APTIV TECHNOLOGIES AG
  • EP4601420A1 patent drawingFigure 1~2
  • EP4601420A1 patent drawingFigure 3~4
  • EP4601420A1 patent drawingFigure 5~6

AI summary

A printed circuit board, PCB, comprising: a first pin pad (PP1), adapted to be connected to a first pin of an integrated circuit, IC, chip, wherein the first pin of the IC chip is a pin for a D-PHY function and a C-PHY function provided by the IC chip; a first wire (W1), adapted as a line for the D-PHY function; a second wire (W2), adapted as a line for the C-PHY function; and a first assembly option module (A1), adapted to provide a first option of connecting the first pin pad (PP1) to the first wire (W1) if the IC chip to be assembled onto the PCB is to provide the D-PHY function, or to provide a second option of connecting the first pin pad (PP1) to the second wire (W2) if the IC chip to be assembled onto the PCB is to provide the C-PHY function.