Untraceable Clock Domain Detection Through PTP Drift Averaging

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Solution Overview

Problem

Timing nodes in wireless networks often use inaccurate clocks that are untraceable with respect to one another, leading to synchronization issues and inefficient resource utilization.

Innovation Solution

Systems and methods to determine communication clock traceability by establishing PTP Delay Request-Response Messaging sessions, calculating time drifts, and selecting PTP and SyncE clocks to synchronize network devices, optimizing resource usage and preventing clock offsets.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If timing nodes use multiple clocks to improve synchronization coverage, then the network can maintain more clock sources, but the clocks may become untraceable and synchronization accuracy deteriorates

Engineering Contradiction:
Improvenumber of clock sourcesVSAvoidsynchronization accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The system continuously monitors clock traceability relationships and provides feedback to the clock selection logic. When a clock is determined to be untraceable, the system adjusts its clock selection to maintain only traceable clocks, ensuring synchronization accuracy while adapting to changing network conditions.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces an intermediary traceability determination mechanism that assesses the relationship between clocks before allowing them to be used together. This intermediary check prevents untraceable clocks from disrupting synchronization, enabling the network to safely use multiple clock sources.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If timing nodes use memory and computational resources to track multiple clocks, then more clock information can be monitored, but resource consumption increases

Engineering Contradiction:
Improveclock monitoring capabilityVSAvoidprocessor and memory resources
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system extracts and monitors only the essential traceability parameters of clocks rather than tracking all clock attributes. By focusing on the critical traceability relationship, the system maintains reliable clock monitoring while minimizing processor and memory resource consumption.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial monitoring by tracking only the necessary clock parameters required for traceability determination, rather than monitoring all possible clock characteristics. This partial action approach provides sufficient reliability for synchronization while reducing overall resource usage.

Inventive Principle:
Principle #16Partial or excessive action

3Ease of operation

If timing nodes select clocks without traceability verification, then clock selection is faster and simpler, but clock offsets and synchronization errors occur

Engineering Contradiction:
Improveclock selection speedVSAvoidsynchronization reliability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The system performs preliminary traceability verification on clocks before selecting them for synchronization. By checking traceability in advance, the system ensures synchronization reliability while maintaining relatively fast clock selection through pre-validation of clock candidates.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12429903B2System and method to determine sets of untraceable clock domains
Publication Date: 2025.09.30 CISCO TECHNOLOGY INC
  • US12429903B2 patent drawing
  • US12429903B2 patent drawing
  • US12429903B2 patent drawing

AI summary

An apparatus configured to determine sets of untraceable clock domains in the communication network may comprise a memory and a processor communicatively coupled to one another. The processor may be configured to select a clock as a Precision Time Protocol (PTP) clock, calculate a time drift associated with another clock, and average the time drift over multiple successive PTP timestamps. Further, the processor may be configured to generate a report indicating whether the clock is offset with respect to a PTP clock based on whether an average of the time drift over the successive PTP timestamps is higher than the predefined threshold.