Upper Contact Structure for Misalignment-Tolerant Memory Wiring

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Solution Overview

Problem

The challenge of increasing the degree of integration in semiconductor devices while maintaining reliability and yield is limited by the fine pattern forming techniques, particularly in two-dimensional semiconductor memory devices, which require ultra-expensive miniaturization and are prone to defects due to misalignment of contacts.

Innovation Solution

A semiconductor device design featuring a lower insulating film with trenches, a wiring pattern, a capping insulating film with recess and liner portions, and an upper contact structure that includes a contact recess, extended, and plug portions to enhance connectivity and prevent defects, thereby improving product reliability and yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If fine pattern forming techniques are used to increase degree of integration, then productivity and integration density improve, but manufacturing precision deteriorates due to misalignment defects

Engineering Contradiction:
Improvedegree of integrationVSAvoidalignment precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming a capping insulating film with a recess portion and liner portion before forming the upper contact. This pre-structured capping film guides the upper contact formation process, ensuring proper alignment with the lower wiring pattern before the actual contact is created, thus preventing misalignment defects while enabling fine pattern integration

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses the capping insulating film with its recess and liner structures as an intermediary element between the lower wiring pattern and the upper contact. This intermediary structure provides a predefined pathway and alignment reference that mediates the connection process, ensuring precise alignment even when dealing with fine pattern dimensions

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If contact alignment is tightened to improve manufacturing precision, then alignment precision improves, but device complexity increases due to additional structural elements

Engineering Contradiction:
Improvealignment precisionVSAvoidcontact structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the contact structure into distinct functional portions: the upper contact, the extended portion, and the plug portion. This segmentation allows each part to serve a specific purpose in the alignment and connection process, simplifying the overall manufacturing process while maintaining high alignment precision through the structured approach

Inventive Principle:
Principle #1Segmentation

3Productivity

If wiring pattern line width is reduced to increase integration, then degree of integration improves, but reliability deteriorates due to misalignment defects

Engineering Contradiction:
Improvedegree of integrationVSAvoidproduct reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The pre-formed capping insulating film with recess and liner structures serves as a preliminary alignment guide that ensures the upper contact will be properly positioned over the fine-line wiring pattern. This preliminary structure compensates for the reduced tolerance margins inherent in fine pattern fabrication, maintaining reliability despite smaller feature sizes

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The capping insulating film acts as an intermediary that protects and guides the connection process to fine-line wiring patterns. By providing a structured interface with recess and liner portions, it ensures that even reduced-width wiring patterns can be reliably connected without misalignment defects

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12532727B2Semiconductor device, semiconductor memory device including the same, electronic system including the same, and method for fabricating the same
Publication Date: 2026.01.20 SAMSUNG ELECTRONICS CO LTD
  • US12532727B2 patent drawing
  • US12532727B2 patent drawing
  • US12532727B2 patent drawing

AI summary

A semiconductor device includes a lower insulating film that includes a first and second trenches on a substrate, a first wiring in the first trench, a second wiring in the second trench, a capping insulating film including an insulating recess portion and an insulating liner portion, an upper insulating film on the capping insulating film, and an upper contact that penetrates the capping insulating film and connects to the first wiring, The insulating recess portion is in the second trench and the insulating liner portion extends along an upper surface of the lower insulating film. The upper contact includes a contact recess portion in the first trench, an extended portion connected to the contact recess portion, and a plug portion connected to the extended portion inside the upper insulating film. A width of the extended portion is greater than a width of the plug portion.