Semiconductor Memory Device USB Connector Controller Mounting

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Solution Overview

Problem

Current USB memory devices face challenges in achieving backward compatibility with USB2.0 and USB3.0 standards, particularly in ensuring data transfer speeds and reliability, as existing configurations are prone to signal degradation and noise due to the use of multiple wiring layers and through-holes.

Innovation Solution

A semiconductor memory device configuration where the USB connector and controller are mounted on the same surface of a substrate with differential pair wirings for USB3.0 on the top surface and USB2.0 wirings on a separate layer, reducing signal noise and allowing for efficient data transfer at both speeds while minimizing substrate area and component interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If USB connector and controller are mounted on different surfaces with through-holes for wiring, then data transfer connectivity is achieved, but signal degradation and noise increase

Engineering Contradiction:
Improvesignal qualityVSAvoidwiring structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The USB connector and controller are mounted on the same surface of the substrate, eliminating the need for through-holes and complex multi-layer wiring. This merging of mounting locations directly reduces signal degradation and noise while maintaining full USB 3.0 functionality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The harmful element (through-holes causing signal degradation) is removed from the design by mounting both components on the same surface, allowing all wiring to remain on the surface level without penetrating through the substrate.

Inventive Principle:
Principle #2Taking out (Extraction)

2Adaptability or versatility

If multiple wiring layers are used for USB3.0 and USB2.0, then both standards are supported, but manufacturing complexity and cost increase

Engineering Contradiction:
ImproveUSB standard compatibilityVSAvoidsubstrate fabrication
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

Instead of using multiple wiring layers in the vertical dimension, the patent routes USB3.0 and USB2.0 signals in separate regions on the same surface plane, using spatial separation rather than vertical stacking to achieve standard compatibility.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The substrate surface is segmented into distinct wiring regions: one region for USB3.0 differential pairs and another for USB2.0 signals, allowing both standards to coexist without requiring complex multi-layer structures.

Inventive Principle:
Principle #1Segmentation

3Device complexity

If USB connector and controller are mounted on the same surface, then wiring complexity is reduced, but component placement space is constrained

Engineering Contradiction:
Improvewiring structureVSAvoidcomponent placement area
Core Design Contradiction:
Device complexityVSArea of stationary object

Solution Approach 1:

Different regions of the substrate surface are assigned different functions: one area accommodates the USB connector with its differential pairs, while another area hosts the controller with its signal lines, optimizing space utilization for each component's specific wiring requirements.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9351418B2Semiconductor memory device
Publication Date: 2016.05.24 KIOXIA CORP
  • US9351418B2 patent drawing
  • US9351418B2 patent drawing
  • US9351418B2 patent drawing

AI summary

According to one embodiment, semiconductor memory device is capable of operating at a first mode and a second mode which is higher in speed than the first mode. The semiconductor memory device comprising: a semiconductor memory; a controller which controls the semiconductor memory; a connector which is provided with terminals for sending and receiving data to and from an external device; and a substrate on which the semiconductor memory, the controller, and the connector are mounted, the substrate comprising a plurality of wiring layers. The controller and the connector are mounted on an identical surface of the substrate. The substrate comprises a wiring which connects a mounting pad for the terminal for data transfer at the second mode of the connector and a mounting pad for a pin for data transfer at the second mode of the controller to each other on the wiring layer on a mounting surface for the connector and the controller.