User-Mode Container State for New Processor Instructions

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Solution Overview

Problem

Existing operating systems do not support new processor instructions, leading to longer market lead times and performance limitations for applications utilizing these instructions, as they require context switching and management of state information not visible to the OS, necessitating software updates and OS updates.

Innovation Solution

Implementing user-mode instructions for operating system transparent instruction state management, allowing applications to utilize new processor features without requiring OS support, using instructions like 'AX_Enter' and 'AX_Abort' for context switching and state management in a user-mode managed container area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If operating systems support new processor instructions, then applications can utilize new processor features, but OS updates are required which increases device complexity and update requirements

Engineering Contradiction:
Improveapplication ability to utilize new processor featuresVSAvoidOS update requirements
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the state management functionality by creating separate state areas: OS-managed state and user-mode managed state (container state). This allows new processor instructions to operate with additional state in user mode without requiring the OS to be updated or aware of the new state structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces container state as an intermediary layer between the application and the OS. The container state area holds additional state information that the OS does not manage, allowing applications to use new processor features while the OS remains unchanged. The AX_Enter and AX_Abort instructions mediate between user mode and kernel mode to manage this container state.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If context switching is implemented for new instructions, then state management is possible, but performance is reduced due to additional overhead

Engineering Contradiction:
Improvestate management capabilityVSAvoidapplication performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the management of additional state from the kernel mode OS and places it in user mode through container state. By taking out the state management responsibility from the OS context switching mechanism, the system avoids the performance penalty of full context switches while maintaining reliable state management for new processor instructions.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements self-service by allowing user mode applications to manage their own additional state through container state without requiring OS intervention. The AX_Enter instruction enables user mode to set up container state and execute new instructions, while AX_Abort handles exits, making the system self-managing and eliminating the need for costly OS-mediated context switches.

Inventive Principle:
Principle #25Self-service

3Adaptability or versatility

If new processor instructions are implemented, then feature benefits are enhanced, but market lead time increases due to required OS updates

Engineering Contradiction:
Improveprocessor feature capabilityVSAvoidmarket lead time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent prepares the ground for new processor instructions by implementing container state and AX_Enter/AX_Abort instructions in advance, before OS updates are available. This preliminary action in user mode allows applications to immediately utilize new processor features upon hardware release, eliminating the waiting period for OS updates and reducing market lead time.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3929731B1Apparatuses, methods, and systems for instructions for operating system transparent instruction state management of new instructions for application threads
Publication Date: 2025.09.10 INTEL CORP
  • EP3929731B1 patent drawingFigure 1
  • EP3929731B1 patent drawingFigure 2A
  • EP3929731B1 patent drawingFigure 2B

AI summary

Systems, methods, and apparatuses relating to an instruction for operating system transparent instruction state management of new instructions for application threads are described. In one embodiment, a hardware processor includes a decoder to decode a single instruction into a decoded single instruction, and an execution circuit to execute the decoded single instruction to cause a context switch from a current state to a state comprising additional state data that is not supported by an execution environment of an operating system that executes on the hardware processor.